Inventor · disambiguated record
Paul R. Findley
Also filed as: FINDLEY PAUL · FINDLEY PAUL R · FINDLEY PAUL RAJ
9 granted patents·663 citations·filing 1996–2005
92Inventor score
Files withVLSI TECHNOLOGY INC5FINDLEY PAUL1KONINKL PHILIPS ELECTRONICS NV1PHILIPS ELECTRONICS NA1RF MICRO DEVICES INC1
Top patents by PatentIndex Score
9 records- 0195US5994766AFlip chip circuit arrangement with redistribution layer that minimizes crosstalkVLSI TECHNOLOGY INC·Filed 1998·Granted Nov 30, 1999·248 cites·18 claims
- 0288US6020616AAutomated design of on-chip capacitive structures for suppressing inductive noiseVLSI TECHNOLOGY INC·Filed 1998·Granted Feb 1, 2000·103 cites·21 claims
- 0387US6972658B1Differential inductor design for high self-resonance frequencyRF MICRO DEVICES INC·Filed 2003·Granted Dec 6, 2005·63 cites·17 claims
- 0487US5763955APatterned filled layers for integrated circuit manufacturingVLSI TECHNOLOGY INC·Filed 1996·Granted Jun 9, 1998·122 cites·12 claims
- 0584US6243653B1Methods and apparatus for extracting parasitic capacitance values from a physical design of an integrated circuitVLSI TECHNOLOGY INC·Filed 1998·Granted Jun 5, 2001·59 cites·42 claims
- 0674US8276259B1Method of constructing a differential inductorFINDLEY PAUL·Filed 2005·Granted Oct 2, 2012·10 cites·9 claims
- 0771US6327695B1Automated design of on-chip capacitive structures for suppressing inductive noisePHILIPS ELECTRONICS NA·Filed 1999·Granted Dec 4, 2001·34 cites·15 claims
- 0842US6751579B1Method of scaling table based cell library timing models in order to take into account process, temperature and power supplyKONINKL PHILIPS ELECTRONICS NV·Filed 1999·Granted Jun 15, 2004·15 cites·21 claims
- 0934US5923565AApparatus and method for extracting capacitance in the presence of two ground planesVLSI TECHNOLOGY INC·Filed 1997·Granted Jul 13, 1999·9 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →