Inventor · disambiguated record
Paul Michael Guglielmi
Also filed as: GUGLIELMI PAUL M · GUGLIELMI PAUL MICHAEL
7 granted patents·661 citations·filing 1975–2000
90Inventor score
Top patents by PatentIndex Score
7 records- 0193US4099231AMemory control system for transferring selected words in a multiple memory word exchange during one memory cycleDIGITAL EQUIPMENT CORP·Filed 1975·Granted Jul 4, 1978·118 cites·21 claims
- 0292US4712190ASelf-timed random access memory chipDIGITAL EQUIPMENT CORP·Filed 1985·Granted Dec 8, 1987·111 cites·6 claims
- 0391US6353877B1Performance optimization and system bus duty cycle reduction by I/O bridge partial cache line writeCOMPAQ COMPUTER CORP·Filed 2000·Granted Mar 5, 2002·70 cites·14 claims
- 0490US5953538AMethod and apparatus providing DMA transfers between devices coupled to different host bus bridgesDIGITAL EQUIPMENT CORP·Filed 1996·Granted Sep 14, 1999·179 cites·15 claims
- 0589US5172011ALatch circuit and method with complementary clocking and level sensitive scan capabilityDIGITAL EQUIPMENT CORP·Filed 1989·Granted Dec 15, 1992·95 cites·20 claims
- 0669US6012120AMethod and apparatus for providing DMA transfers between devices coupled to different host bus bridgesDIGITAL EQUIPMENT CORP·Filed 1999·Granted Jan 4, 2000·54 cites·16 claims
- 0760US6128711APerformance optimization and system bus duty cycle reduction by I/O bridge partial cache line writesCOMPAQ COMPUTER CORP·Filed 1996·Granted Oct 3, 2000·34 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →