Inventor · disambiguated record
Patrick Jerier
Also filed as: JERIER PATRICK
3 granted patents·10 citations·filing 1998–2002
62Inventor score
Files withST MICROELECTRONICS SA3
Top patents by PatentIndex Score
3 records- 0160US6776842B2Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenicST MICROELECTRONICS SA·Filed 2002·Granted Aug 17, 2004·4 cites·20 claims
- 0242US6162706AMethod of epitaxy on a silicon substrate comprising areas heavily doped with arsenicST MICROELECTRONICS SA·Filed 1998·Granted Dec 19, 2000·6 cites·10 claims
- 0326US6294443B1Method of epitaxy on a silicon substrate comprising areas heavily doped with boronST MICROELECTRONICS SA·Filed 1999·Granted Sep 25, 2001·0 cites·29 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →