Inventor · disambiguated record
Parsotam T. Patel
Also filed as: PATEL PARSOTAM T · PATEL PARSOTAM TRIKAM
17 granted patents·12 pending applications·544 citations·filing 1980–2008
95Inventor score
Top patents by PatentIndex Score
29 records- 0187US6601222B1Coupled noise estimation and avoidance of noise-failure using global routing informationIBM·Filed 2000·Granted Jul 29, 2003·53 cites·24 claims
- 0287US6218631B1Structure for reducing cross-talk in VLSI circuits and method of making same using filled channels to minimize cross-talkIBM·Filed 1998·Granted Apr 17, 2001·88 cites·9 claims
- 0380US6415422B1Method and system for performing capacitance estimations on an integrated circuit design routed by a global routing toolIBM·Filed 1999·Granted Jul 2, 2002·89 cites·16 claims
- 0478US6467069B2Timing closure and noise avoidance in detailed routingIBM·Filed 2000·Granted Oct 15, 2002·24 cites·21 claims
- 0578US4363110ANon-volatile dynamic RAM cellIBM·Filed 1980·Granted Dec 7, 1982·25 cites·21 claims
- 0677US6735754B2Method and apparatus to facilitate global routing for an integrated circuit layoutSUN MICROSYSTEMS INC·Filed 2002·Granted May 11, 2004·24 cites·21 claims
- 0765US5764532AAutomated method and system for designing an optimized integrated circuitIBM·Filed 1995·Granted Jun 9, 1998·49 cites·24 claims
- 0863US5831870AMethod and system for characterizing interconnect data within an integrated circuit for facilitating parasitic capacitance estimationIBM·Filed 1996·Granted Nov 3, 1998·46 cites·15 claims
- 0962US6832277B2Method and apparatus for transmitting data that utilizes delay elements to reduce capacitive couplingSUN MICROSYSTEMS INC·Filed 2001·Granted Dec 14, 2004·9 cites·38 claims
- 1062US6694502B2Data structure for fine-grid multi-level VLSI routing and method for storing the data structure in a computer readable mediumSUN MICROSYSTEMS INC·Filed 2001·Granted Feb 17, 2004·8 cites·13 claims
- 1161US4390890ASaturation-limited bipolar transistor deviceIBM·Filed 1980·Granted Jun 28, 1983·16 cites·4 claims
- 1258US6360350B1Method and system for performing circuit analysis on an integrated-circuit design having design data available in different formsIBM·Filed 1997·Granted Mar 19, 2002·39 cites·12 claims
- 1356US2008263498A1Enhanced Routing Grid System and MethodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 1456US2008263496A1Enhanced routing grid system and methodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 1556US2008263497A1Enhanced Routing Grid System and MethodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 1656US2009070726A1Enhanced Routing Grid System and MethodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 1755US2008059936A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 1853US4988636AMethod of making bit stack compatible input/output circuitsIBM·Filed 1990·Granted Jan 29, 1991·21 cites·14 claims
- 1953US2008059935A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 2053US2007028201A1Enhanced routing grid system and methodSTAKTEK GROUP LP·Filed 2006·Application pending·0 cites
- 2153US2008072201A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 2253US2008184187A1Enhanced Routing Grid System and MethodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 2353US2008066044A1Enhanced Routing Grid System And MethodPYXIS TECHNOLOGY INC·Filed 2007·Application pending·0 cites
- 2450US2006281221A1Enhanced routing grid system and methodMEHROTRA SHARAD·Filed 2005·Application pending·0 cites
- 2549US5045913ABit stack compatible input/output circuitsIBM·Filed 1990·Granted Sep 3, 1991·17 cites·12 claims
- 2648US6230302B1Method and system for performing timing analysis on an integrated circuit designIBM·Filed 1998·Granted May 8, 2001·20 cites·9 claims
- 2747US2009254875A1Proactive routing system and methodPYXIS TECHNOLOGY INC·Filed 2008·Application pending·0 cites
- 2840US4446611AMethod of making a saturation-limited bipolar transistor deviceIBM·Filed 1983·Granted May 8, 1984·6 cites·12 claims
- 2933US5649170AInterconnect and driver optimization for high performance processorsIBM·Filed 1995·Granted Jul 15, 1997·10 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →