Inventor · disambiguated record
Patrizia Sonego
Also filed as: SONEGO PATRIZIA
5 granted patents·55 citations·filing 1997–2000
80Inventor score
Technology areasH10P
Top patents by PatentIndex Score
5 records- 0175US6472750B1Process for realizing an intermediate dielectric layer for enhancing the planarity in semiconductor electronic devicesST MICROELECTRONICS SRL·Filed 2000·Granted Oct 29, 2002·18 cites·13 claims
- 0250US6630739B1Planarization structure and method for dielectric layersST MICROELECTRONICS SRL·Filed 2000·Granted Oct 7, 2003·3 cites·16 claims
- 0350US6239042B1Process for realizing an intermediate dielectric layer for enhancing the planarity in semiconductor electronic devicesSGS THOMSON MICROELECTRONICS·Filed 1997·Granted May 29, 2001·15 cites·39 claims
- 0444US5994231AProcess for depositing a stratified dielectric structure for enhancing the planarity of semiconductor electronic devicesSGS THOMSON MICROELECTRONICS·Filed 1997·Granted Nov 30, 1999·12 cites·8 claims
- 0539US6156637AMethod of planarizing a semiconductor device by depositing a dielectric ply structureST MICROELECTRONICS SRL·Filed 1997·Granted Dec 5, 2000·7 cites·29 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →