Inventor · disambiguated record
Panduka Wijetunga
Also filed as: WIJETUNGA PANDUKA
10 granted patents·6 pending applications·16 citations·filing 2003–2024
82Inventor score
Top patents by PatentIndex Score
16 records- 0190US12328070B2Constant-on-time power converter with adaptive interleavingRAMBUS INC·Filed 2022·Granted Jun 10, 2025·2 cites·14 claims
- 0289US11900985B1Clocking architecture supporting multiple data rates and reference edge selectionRAMBUS INC·Filed 2021·Granted Feb 13, 2024·3 cites·20 claims
- 0385US11626876B2Self-isolating output driverRAMBUS INC·Filed 2021·Granted Apr 11, 2023·2 cites·20 claims
- 0476US2025110540A1Power management integrated circuit device having multiple initialization/power up modesRAMBUS INC·Filed 2024·Application pending·0 cites
- 0569US12147285B2Power management integrated circuit device having multiple initialization/power up modesRAMBUS INC·Filed 2022·Granted Nov 19, 2024·0 cites·20 claims
- 0668US2024063835A1Receiver With Improved Noise ImmunityRAMBUS INC·Filed 2023·Application pending·0 cites
- 0767US2025119148A1Clock bufferRAMBUS INC·Filed 2024·Application pending·0 cites
- 0867US2024395309A1Methods and Circuits for Power Management of a Memory ModuleRAMBUS INC·Filed 2024·Application pending·0 cites
- 0966US11777546B2Receiver with improved noise immunityRAMBUS INC·Filed 2022·Granted Oct 3, 2023·0 cites·20 claims
- 1065US12456922B2Implementing a buck converter supporting automatic continuous conduction mode and discontinuous conduction modeRAMBUS INC·Filed 2022·Granted Oct 28, 2025·0 cites·17 claims
- 1165US12155391B2Clock bufferRAMBUS INC·Filed 2022·Granted Nov 26, 2024·0 cites·20 claims
- 1262US12033683B2Methods and circuits for power management of a memory moduleRAMBUS INC·Filed 2022·Granted Jul 9, 2024·0 cites·20 claims
- 1355US7023243B2Current source evaluation sense-amplifierUNIV SOUTHERN CALIFORNIA·Filed 2003·Granted Apr 4, 2006·9 cites·2 claims
- 1454US2024243662A1Dc-dc converter with switching noise suppression circuitryRAMBUS INC·Filed 2024·Application pending·0 cites
- 1551US11782476B2Circuits and methods for sample timing in correlated and uncorrelated signaling environmentsRAMBUS INC·Filed 2021·Granted Oct 10, 2023·0 cites·11 claims
- 1639US2024055068A1Signal skew correction in integrated circuit memory devicesRAMBUS INC·Filed 2021·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Panduka Wijetunga files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →