Inventor · disambiguated record
Peter K. Hazen
Also filed as: HAZEN PETER · HAZEN PETER K
21 granted patents·1,126 citations·filing 1991–2000
97Inventor score
Files withINTEL CORP21
Top patents by PatentIndex Score
21 records- 0194US5937424AMethod and apparatus for suspending the writing of a nonvolatile semiconductor memory with program suspend commandINTEL CORP·Filed 1997·Granted Aug 10, 1999·148 cites·16 claims
- 0292US6154819AApparatus and method using volatile lock and lock-down registers and for protecting memory blocksINTEL CORP·Filed 1998·Granted Nov 28, 2000·112 cites·11 claims
- 0392US5280447AFloating gate nonvolatile memory with configurable erasure blocksINTEL CORP·Filed 1992·Granted Jan 18, 1994·105 cites·20 claims
- 0490US6633950B1Nonvolatile writeable memory with preemption pinINTEL CORP·Filed 2000·Granted Oct 14, 2003·52 cites·12 claims
- 0590US6223290B1Method and apparatus for preventing the fraudulent use of a cellular telephoneINTEL CORP·Filed 1998·Granted Apr 24, 2001·166 cites·49 claims
- 0689US6088264AFlash memory partitioning for read-while-write operationINTEL CORP·Filed 1998·Granted Jul 11, 2000·77 cites·23 claims
- 0781US5668760ANonvolatile memory with a write protection circuitINTEL CORP·Filed 1996·Granted Sep 16, 1997·47 cites·16 claims
- 0878US5594686AMethod and apparatus for protecting data stored in flash memoryINTEL CORP·Filed 1995·Granted Jan 14, 1997·42 cites·20 claims
- 0977US6201739B1Nonvolatile writeable memory with preemption pinINTEL CORP·Filed 1996·Granted Mar 13, 2001·64 cites·9 claims
- 1077US6148360ANonvolatile writeable memory with program suspend commandINTEL CORP·Filed 1996·Granted Nov 14, 2000·36 cites·13 claims
- 1175US5267196AFloating gate nonvolatile memory with distributed blocking featureINTEL CORP·Filed 1992·Granted Nov 30, 1993·37 cites·19 claims
- 1274US5940861AMethod and apparatus for preempting operations in a nonvolatile memory in order to read code from the nonvolatile memoryINTEL CORP·Filed 1996·Granted Aug 17, 1999·35 cites·12 claims
- 1373US6510083B1Electrically erasable and programmable memory that allows data update without prior erasure of the memoryINTEL CORP·Filed 1997·Granted Jan 21, 2003·34 cites·18 claims
- 1470US5243575AAddress transition detection to write state machine interface circuit for flash memoryINTEL CORP·Filed 1992·Granted Sep 7, 1993·31 cites·31 claims
- 1567US5504875ANonvolatile memory with a programmable output of selectable width and a method for controlling the nonvolatile memory to switch between different output widthsINTEL CORP·Filed 1993·Granted Apr 2, 1996·47 cites·27 claims
- 1661US5274278AHigh-speed tri-level decoder with dual-voltage isolationINTEL CORP·Filed 1991·Granted Dec 28, 1993·21 cites·6 claims
- 1750US6182189B1Method and apparatus for placing a memory in a read-while-write modeINTEL CORP·Filed 1998·Granted Jan 30, 2001·21 cites·12 claims
- 1849US5379413AUser selectable word/byte input architecture for flash EEPROM memory write and erase operationsINTEL CORP·Filed 1992·Granted Jan 3, 1995·13 cites·29 claims
- 1943US6150835AMethod and apparatus for fast production programming and low-voltage in-system writes for programmable logic deviceINTEL CORP·Filed 1998·Granted Nov 21, 2000·7 cites·11 claims
- 2042US5742935AMethod and apparatus for controlling the protection mode of flash memoryINTEL CORP·Filed 1995·Granted Apr 21, 1998·14 cites·15 claims
- 2140US5572707ANonvolatile memory with a programmable configuration cell and a configuration logic for temporarily reconfiguring the memory without altering the programmed state of the configuration cellINTEL CORP·Filed 1995·Granted Nov 5, 1996·17 cites·3 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →