Inventor · disambiguated record
Peter Hedinger
Also filed as: HEDINGER PETER
10 granted patents·1 pending application·73 citations·filing 2002–2022
88Inventor score
Technology areasG06F
Top patents by PatentIndex Score
11 records- 0176US7617386B2Scheduling thread upon ready signal set when port transfers data on trigger time activationXMOS LTD·Filed 2007·Granted Nov 10, 2009·9 cites·62 claims
- 0274US8966488B2Synchronising groups of threads with dedicated hardware logicMAY MICHAEL D·Filed 2007·Granted Feb 24, 2015·8 cites·57 claims
- 0374US8347312B2Thread communicationsXMOS LTD·Filed 2007·Granted Jan 1, 2013·8 cites·47 claims
- 0471US7613909B2Resuming thread to service ready port transferring data externally at different clock rate than internal circuitry of a processorXMOS LTD·Filed 2007·Granted Nov 3, 2009·6 cites·62 claims
- 0569US6959363B2Cache memory operationSGS THOMSON MICROELECTRONICS·Filed 2002·Granted Oct 25, 2005·16 cites·36 claims
- 0665US7062634B1Processor and a method for handling and encoding no-operation instructionsSGS THOMSON MICROELECTRONICS·Filed 2002·Granted Jun 13, 2006·13 cites·26 claims
- 0759US6883067B2Evaluation and optimization of codeSGS THOMSON MICROELECTRONICS·Filed 2002·Granted Apr 19, 2005·11 cites·14 claims
- 0854US12124699B2Processing device for handling misaligned dataGRAPHCORE LTD·Filed 2022·Granted Oct 22, 2024·0 cites·26 claims
- 0949US7216342B2Code generationSGS THOMSON MICROELECTRONICS·Filed 2002·Granted May 8, 2007·2 cites·14 claims
- 1037US11256516B2Processing system with a main processor pipeline and a co-processor pipelineXMOS LTD·Filed 2018·Granted Feb 22, 2022·0 cites·20 claims
- 1134US2005278510A1Pseudo register file write portsSGS THOMSON MICROELECTRONICS·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →