Inventor · disambiguated record
Pei-Ren Jeng
Also filed as: JENG PEI RENG · JENG PEI-REN
97 granted patents·18 pending applications·2,103 citations·filing 1997–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD64MACRONIX INT CO LTD28IND TECH RES INST7TAIWAN SEMICONDUCTOR MFG4JENG PEI-REN2
Top patents by PatentIndex Score
115 records- 0199US8963258B2FinFET with bottom SiGe layer in source/drainTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 24, 2015·342 cites·20 claims
- 0298US9859386B2Self aligned contact schemeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Jan 2, 2018·496 cites·20 claims
- 0398US9548366B1Self aligned contact schemeTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 17, 2017·583 cites·20 claims
- 0496US11581425B2Method for manufacturing semiconductor structure with enlarged volumes of source-drain regionsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Feb 14, 2023·3 cites·20 claims
- 0595US6380068B2Method for planarizing a flash memory deviceMACRONIX INT CO LTD·Filed 2001·Granted Apr 30, 2002·195 cites·16 claims
- 0694US10483396B1Interfacial layer between fin and source/drain regionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Nov 19, 2019·10 cites·20 claims
- 0793US11948840B2Protective layer over FinFET and method of forming sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Apr 2, 2024·2 cites·20 claims
- 0893US9831345B2FinFET with rounded source/drain profileTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Nov 28, 2017·13 cites·20 claims
- 0993US9293581B2FinFET with bottom SiGe layer in source/drainTAIWAN SEMICONDUCTOR MFG·Filed 2015·Granted Mar 22, 2016·8 cites·20 claims
- 1092US9818846B2Selectively deposited spacer film for metal gate sidewall protectionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Nov 14, 2017·7 cites·20 claims
- 1191US11854901B2Semiconductor method and deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·1 cites·20 claims
- 1291US7393745B2Method for fabricating self-aligned double layered silicon-metal nanocrystal memory elementIND TECH RES INST·Filed 2006·Granted Jul 1, 2008·17 cites·8 claims
- 1389US9873943B2Apparatus and method for spatial atomic layer depositionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Jan 23, 2018·4 cites·20 claims
- 1489US8574995B2Source/drain doping method in 3D devicesJENG PEI-REN·Filed 2011·Granted Nov 5, 2013·11 cites·20 claims
- 1588US6303490B1Method for barrier layer in copper manufactureMACRONIX INT CO LTD·Filed 2000·Granted Oct 16, 2001·42 cites·18 claims
- 1687US11302782B2In-situ straining epitaxial processTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Apr 12, 2022·2 cites·20 claims
- 1787US10161039B2Apparatus and method for spatial atomic layer depositionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Dec 25, 2018·3 cites·20 claims
- 1887US8822283B2Self-aligned insulated film for high-k metal gate deviceNG JIN-AUN·Filed 2011·Granted Sep 2, 2014·7 cites·20 claims
- 1987US7446038B2Interlayer interconnect of three-dimensional memory and method for manufacturing the sameIND TECH RES INST·Filed 2006·Granted Nov 4, 2008·14 cites·30 claims
- 2085US12068395B2Method for forming an undoped region under a source/drainTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 20, 2024·1 cites·20 claims
- 2185US2025351404A1Method for forming an undoped region under a source/drainTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2284US9911829B2FinFET with bottom SiGe layer in source/drainTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Mar 6, 2018·3 cites·20 claims
- 2384US5877074AMethod for improving the electrical property of gate in polycide structureHOLTEK MICROELECTRONICS INC·Filed 1997·Granted Mar 2, 1999·61 cites·7 claims
- 2483US7723226B2Interconnects containing bilayer porous low-k dielectrics using different porogen to structure former ratioTAIWAN SEMICONDUCTOR MFG·Filed 2007·Granted May 25, 2010·11 cites·19 claims
- 2583US6455440B1Method for preventing polysilicon stringer in memory deviceMACRONIX INT CO LTD·Filed 2001·Granted Sep 24, 2002·33 cites·11 claims
- 2682US6664182B2Method of improving the interlayer adhesion property of low-k layers in a dual damascene processMACRONIX INT CO LTD·Filed 2001·Granted Dec 16, 2003·33 cites·17 claims
- 2781US10388792B2FinFET with rounded source/drain profileTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 20, 2019·2 cites·20 claims
- 2881US2024096958A1Supportive layer in source/drains of finfet devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 2979US11855142B2Supportive layer in source/drains of FinFET devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 26, 2023·0 cites·20 claims
- 3079US9647066B2Dummy FinFET structure and method of making sameLU CHANG-SHEN·Filed 2012·Granted May 9, 2017·8 cites·20 claims
- 3179US9142402B2Uniform shallow trench isolation regions and the method of forming the sameLIOU YU-LING·Filed 2011·Granted Sep 22, 2015·6 cites·18 claims
- 3279US2024274667A1Semiconductor Device and Method of ManufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3379US2024371983A1Semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3478US11798984B2Seamless gap fillTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Oct 24, 2023·0 cites·20 claims
- 3578US6331472B1Method for forming shallow trench isolationMACRONIX INT CO LTD·Filed 2000·Granted Dec 18, 2001·26 cites·16 claims
- 3678US2024363729A1Method for forming an undoped region under a source/drainTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3778US2025063807A1Semiconductor device and methods of manufacturingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3877US12170228B2Semiconductor device and methods of manufacturingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 17, 2024·0 cites·20 claims
- 3977US11735668B2Interfacial layer between fin and source/drain regionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 22, 2023·0 cites·20 claims
- 4077US11171209B2Semiconductor device and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Nov 9, 2021·1 cites·20 claims
- 4176US12159925B2Semiconductor device and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 3, 2024·0 cites·20 claims
- 4276US10388531B2Self-aligned insulated film for high-k metal gate deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 20, 2019·1 cites·20 claims
- 4376US2025098280A1Semiconductor method and deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 4474US12002854B2Semiconductor device and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jun 4, 2024·0 cites·20 claims
- 4574US11211470B2Semiconductor device and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 28, 2021·1 cites·20 claims
- 4674US2024363418A1Fin field-effect transistor device and method of formingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 4772US11482620B2Interfacial layer between Fin and source/drain regionTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 25, 2022·0 cites·20 claims
- 4872US11476331B2Supportive layer in source/drains of FinFET devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Oct 18, 2022·0 cites·20 claims
- 4972US11239310B2Seamless gap fillTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Feb 1, 2022·0 cites·20 claims
- 5072US6326269B1Method of fabricating self-aligned multilevel mask ROMMACRONIX INT CO LTD·Filed 2000·Granted Dec 4, 2001·20 cites·18 claims
Showing the top 50 of 115 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →