Inventor · disambiguated record
Pei-Hsuan Lee
Also filed as: LEE PEI-HSUAN
41 granted patents·14 pending applications·53 citations·filing 2014–2025
96Inventor score
Top patents by PatentIndex Score
55 records- 0198US11502013B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Nov 15, 2022·4 cites·20 claims
- 0296US11380542B2Selective capping processes and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Jul 5, 2022·3 cites·20 claims
- 0394US10770288B2Selective capping processes and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Sep 8, 2020·9 cites·20 claims
- 0493US10366966B1Method of manufacturing integrated fan-out packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 30, 2019·8 cites·20 claims
- 0592US11756872B2Package structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Sep 12, 2023·2 cites·20 claims
- 0692US11742290B2Interconnect structure and method of forming thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 29, 2023·2 cites·20 claims
- 0790US11444002B2Package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Sep 13, 2022·2 cites·20 claims
- 0888US10790142B2Selective capping processes and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Sep 29, 2020·4 cites·20 claims
- 0985US9425179B2Chip packages and methods of manufacture thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Aug 23, 2016·5 cites·20 claims
- 1084US12374595B2Package system and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 29, 2025·0 cites·20 claims
- 1182US11004758B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 11, 2021·2 cites·20 claims
- 1282US10510623B2Overlay error and process window metrologyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Dec 17, 2019·3 cites·20 claims
- 1382US2025309027A1Package system and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1480US12176279B2Package structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 1580US11121046B2Wafer-level testing method and test structure thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Sep 14, 2021·3 cites·20 claims
- 1679US2025087571A1Package structure and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1778US12165975B2Method of forming interconnect structure having a barrier layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Dec 10, 2024·0 cites·20 claims
- 1878US11990381B2Integrated circuit packages having support ringsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted May 21, 2024·0 cites·20 claims
- 1978US11830742B2Selective capping processes and structures formed therebyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 28, 2023·0 cites·20 claims
- 2077US12243218B2Method and system for scanning waferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 4, 2025·0 cites·20 claims
- 2177US10727118B2Method for manufacturing semiconductor device and pre-clean apparatus for semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Jul 28, 2020·2 cites·20 claims
- 2277US9887073B2Physical vapor deposition system and physical vapor depositing method using the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Feb 6, 2018·2 cites·20 claims
- 2377US2025357348A1Barrier free tungsten liner in contact plugs and the method forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 2477US2024413087A1Interconnect Structure and Method of Forming ThereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2577US2024356199A1Electronic device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2675US2024379541A1Nitrogen Plasma Treatment For Improving Interface Between Etch Stop Layer And Copper InterconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2775US2024371726A1Integrated Circuit Package and MethodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 2874US10756052B2Method of manufacturing integrated fan-out packageTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 25, 2020·1 cites·20 claims
- 2974US2024361381A1In-line electrical detection of defects at wafer levelTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3074US2024379556A1Forming Liners to Facilitate The Formation of Copper-Containing Vias in Advanced Technology NodesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3173US12300571B2Integrated circuit package and methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted May 13, 2025·0 cites·20 claims
- 3273US2024266232A1Semiconductor structure inspection using a high atomic number materialTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 3372US12159830B2Nitrogen plasma treatment for improving interface between etch stop layer and copper interconnectTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 3, 2024·0 cites·20 claims
- 3472US12040247B2Package system and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Jul 16, 2024·0 cites·20 claims
- 3571US12061229B2In-line electrical detection of defects at wafer levelTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Aug 13, 2024·0 cites·20 claims
- 3670US12062832B2Electronic device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Aug 13, 2024·0 cites·9 claims
- 3770US11282810B2Integrated fan-out package and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Mar 22, 2022·0 cites·20 claims
- 3869US11749582B2Package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 5, 2023·0 cites·20 claims
- 3968US11783469B2Method and system for scanning waferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 10, 2023·0 cites·20 claims
- 4068US9460939B2Package-on-package structures and methods of manufacture thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted Oct 4, 2016·1 cites·20 claims
- 4167US2024355740A1Barrier Free Tungsten Liner in Contact Plugs and The Method Forming the SameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 4265US11984365B2Semiconductor structure inspection using a high atomic number materialTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted May 14, 2024·0 cites·20 claims
- 4363US11791206B2Method for forming semiconductor deviceTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Oct 17, 2023·0 cites·20 claims
- 4461US11730816B2Debranching enzyme modified starch, the preparing method and use thereof in hard capsule productionDAH FENG CAPSULE IND CO LTD·Filed 2021·Granted Aug 22, 2023·0 cites·4 claims
- 4560US2025028253A1Method for detecting defects in semiconductor structure and method for classifying semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 4659US11075439B2Electronic device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 27, 2021·0 cites·9 claims
- 4758US10879135B2Overlay error and process window metrologyTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 29, 2020·0 cites·20 claims
- 4858US2025140643A1Package structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 4957US11037289B2Method and system for scanning waferTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 15, 2021·0 cites·20 claims
- 5052US2020023064A1Debranching enzyme modified starch, the preparing method and use thereof in hard capsule productionDAH FENG CAPSULE IND CO LTD·Filed 2018·Application pending·0 cites
Showing the top 50 of 55 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →