Inventor · disambiguated record
Peter Pöchmüller
Also filed as: POCHMUELLER PETER · POCHMULLER PETER · POECHMUELLER PETER
32 granted patents·1 pending application·341 citations·filing 2000–2005
97Inventor score
Top patents by PatentIndex Score
33 records- 0180US6556492B2System for testing fast synchronous semiconductor circuitsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Apr 29, 2003·31 cites·10 claims
- 0279US7113417B2Integrated memory circuitINFINEON TECHNOLOGIES AG·Filed 2004·Granted Sep 26, 2006·26 cites·19 claims
- 0379US6295237B1Semiconductor memory configuration with a built-in-self-testINFINEON TECHNOLOGIES AG·Filed 2000·Granted Sep 25, 2001·29 cites·4 claims
- 0474US6762611B2Test configuration and test method for testing a plurality of integrated circuits in parallelINFINEON TECHOLOGIES AG·Filed 2001·Granted Jul 13, 2004·18 cites·8 claims
- 0572US6822913B2Integrated memory and method for operating an integrated memoryINFINEON TECHNOLOGIES AG·Filed 2003·Granted Nov 23, 2004·18 cites·18 claims
- 0670US6515319B2Field-effect-controlled transistor and method for fabricating the transistorINFINEON TECHNOLOGIES AG·Filed 2001·Granted Feb 4, 2003·17 cites·6 claims
- 0769US6535009B1Configuration for carrying out burn-in processing operations of semiconductor devices at wafer levelINFINEON TECHNOLOGIES AG·Filed 2000·Granted Mar 18, 2003·13 cites·8 claims
- 0867US6448749B2Circuit configuration for regulating the power consumption of an integrated circuitINFINEON TECHNOLOGIES AG·Filed 2001·Granted Sep 10, 2002·12 cites·8 claims
- 0967US6304499B1Integrated dynamic semiconductor memory having redundant units of memory cells, and a method of self-repairINFINEON TECHNOLOGIES AG·Filed 2000·Granted Oct 16, 2001·16 cites·10 claims
- 1066US6438053B1Integrated memory having memory cells and reference cellsINFINEON TECHNOLOGIES AG·Filed 2000·Granted Aug 20, 2002·15 cites·2 claims
- 1165US6472892B2Configuration for testing chips using a printed circuit boardINFINEON TECHNOLOGIES AG·Filed 2000·Granted Oct 29, 2002·11 cites·6 claims
- 1264US6721904B2System for testing fast integrated digital circuits, in particular semiconductor memory modulesINFINEON TECHNOLOGIES AG·Filed 2001·Granted Apr 13, 2004·15 cites·29 claims
- 1363US6661718B2Testing device for testing a memoryINFINEON TECHNOLOGIES AG·Filed 2001·Granted Dec 9, 2003·12 cites·20 claims
- 1463US6601194B1Circuit configuration for repairing a semiconductor memoryINFINEON TECHNOLOGIES AG·Filed 2000·Granted Jul 29, 2003·15 cites·6 claims
- 1563US6487108B2MRAM configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Nov 26, 2002·13 cites·4 claims
- 1661US6871306B2Method and device for reading and for checking the time position of data response signals read out from a memory module to be testedINFINEON TECHNOLOGIES AG·Filed 2001·Granted Mar 22, 2005·12 cites·20 claims
- 1759US6456098B1Method of testing memory cells with a hysteresis curveINFINEON TECHNOLOGIES AG·Filed 2000·Granted Sep 24, 2002·10 cites·15 claims
- 1858US6310812B1Integrated memory having memory cells and reference cellsINFINEON TECHNOLOGIES AG·Filed 2000·Granted Oct 30, 2001·10 cites·4 claims
- 1956US6314018B1Integrated memory with at least two plate segmentsINFINEON TECHNOLOGIES AG·Filed 2000·Granted Nov 6, 2001·9 cites·8 claims
- 2052US6618836B1Configuration and method for producing test signals for testing a multiplicity of semiconductor chipsINFINEON TECHNOLOGIES AG·Filed 2000·Granted Sep 9, 2003·5 cites·5 claims
- 2152US6490191B2Method and configuration for compensating for parasitic current lossesINFINEON TECHNOLOGIES AG·Filed 2001·Granted Dec 3, 2002·7 cites·5 claims
- 2250US7466761B2Configuration for the transmission of signals between a data processing device and a functional unitQIMONDA AG·Filed 2002·Granted Dec 16, 2008·1 cites·12 claims
- 2349US6646937B2Integrated clock generator, particularly for driving a semiconductor memory with a test signalINFINEON TECHNOLOGIES AG·Filed 2002·Granted Nov 11, 2003·6 cites·10 claims
- 2445US7062690B2System for testing fast synchronous digital circuits, particularly semiconductor memory chipsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jun 13, 2006·3 cites·16 claims
- 2544US6741491B2Integrated dynamic memory, and method for operating the integrated dynamic memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted May 25, 2004·4 cites·14 claims
- 2642US6542430B2Integrated memory and memory configuration with a plurality of memories and method of operating such a memory configurationINFINEON TECHNOLOGIES AG·Filed 2001·Granted Apr 1, 2003·3 cites·28 claims
- 2741US6862702B2Address counter for addressing synchronous high-frequency digital circuits, in particular memory devicesINFINEON TECHNOLOGIES AG·Filed 2001·Granted Mar 1, 2005·3 cites·10 claims
- 2841US6839397B2Circuit configuration for generating control signals for testing high-frequency synchronous digital circuitsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Jan 4, 2005·3 cites·11 claims
- 2939US7193426B2Test system and test structure for testing an integrated circuit and an integrated circuit having a test structureINFINEON TECHNOLOGIES AG·Filed 2004·Granted Mar 20, 2007·2 cites·6 claims
- 3038US7203123B2Integrated DRAM memory deviceINFINEON TECHNOLOGIES AG·Filed 2004·Granted Apr 10, 2007·1 cites·16 claims
- 3138US2005233538A1Integrated dynamic memory cell and method for fabricating itINFINEON TECHNOLOGIES AG·Filed 2005·Application pending·0 cites
- 3236US6396752B2Method of testing a memory cell having a floating gateINFINEON TECHNOLOGIES AG·Filed 2001·Granted May 28, 2002·1 cites·7 claims
- 3334US7117403B2Method and device for generating digital signal patternsINFINEON TECHNOLOGIES AG·Filed 2001·Granted Oct 3, 2006·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →