Inventor · disambiguated record
Perry Wang
Also filed as: WANG PERRY · WANG PERRY H
44 granted patents·7 pending applications·566 citations·filing 2000–2018
98Inventor score
Top patents by PatentIndex Score
51 records- 0194US8296743B2Compiler and runtime for heterogeneous multiprocessor systemsLINDERMAN MICHAEL D·Filed 2007·Granted Oct 23, 2012·84 cites·25 claims
- 0293US10585667B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2018·Granted Mar 10, 2020·7 cites·18 claims
- 0390US8719806B2Speculative multi-threading for instruction prefetch and/or trace pre-buildWANG HONG·Filed 2010·Granted May 6, 2014·12 cites·14 claims
- 0490US8037465B2Thread-data affinity optimization using compilerINTEL CORP·Filed 2005·Granted Oct 11, 2011·28 cites·19 claims
- 0589US7941791B2Programming environment for heterogeneous processor resource integrationWANG PERRY·Filed 2007·Granted May 10, 2011·31 cites·12 claims
- 0689US7587584B2Mechanism to exploit synchronization overhead to improve multithreaded performanceINTEL CORP·Filed 2005·Granted Sep 8, 2009·31 cites·25 claims
- 0787US8612949B2Methods and apparatuses for compiler-creating helper threads for multi-threadingLIAO SHIH-WEI·Filed 2009·Granted Dec 17, 2013·18 cites·12 claims
- 0887US7768518B2Enabling multiple instruction stream/multiple data stream extensions on microprocessorsINTEL CORP·Filed 2006·Granted Aug 3, 2010·19 cites·15 claims
- 0985US6928645B2Software-based speculative pre-computation and multithreadingINTEL CORP·Filed 2001·Granted Aug 9, 2005·48 cites·16 claims
- 1081US7631307B2User-programmable low-overhead multithreadingINTEL CORP·Filed 2003·Granted Dec 8, 2009·44 cites·12 claims
- 1180US7398521B2Methods and apparatuses for thread management of multi-threadingINTEL CORP·Filed 2004·Granted Jul 8, 2008·26 cites·14 claims
- 1279US8078831B2Method and apparatus for affinity-guided speculative helper threads in chip multiprocessorsWANG HONG·Filed 2010·Granted Dec 13, 2011·5 cites·8 claims
- 1379US7904696B2Communication paths for enabling inter-sequencer communication following lock competition and accelerator registrationINTEL CORP·Filed 2007·Granted Mar 8, 2011·7 cites·16 claims
- 1479US7487502B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2003·Granted Feb 3, 2009·19 cites·37 claims
- 1579US7404067B2Method and apparatus for efficient utilization for prescient instruction prefetchINTEL CORP·Filed 2003·Granted Jul 22, 2008·25 cites·4 claims
- 1678US7818547B2Method and apparatus for efficient resource utilization for prescient instruction prefetchINTEL CORP·Filed 2008·Granted Oct 19, 2010·7 cites·18 claims
- 1778US7657880B2Safe store for speculative helper threadsINTEL CORP·Filed 2003·Granted Feb 2, 2010·26 cites·30 claims
- 1878US7069545B2Quantization and compression for computation reuseINTEL CORP·Filed 2000·Granted Jun 27, 2006·29 cites·31 claims
- 1976US10459858B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2017·Granted Oct 29, 2019·1 cites·14 claims
- 2075US10877910B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2017·Granted Dec 29, 2020·1 cites·10 claims
- 2173US7814469B2Speculative multi-threading for instruction prefetch and/or trace pre-buildINTEL CORP·Filed 2003·Granted Oct 12, 2010·13 cites·20 claims
- 2272US8843728B2Processor for enabling inter-sequencer communication following lock competition and accelerator registrationINTEL CORP·Filed 2012·Granted Sep 23, 2014·2 cites·19 claims
- 2372US7328433B2Methods and apparatus for reducing memory latency in a software applicationINTEL CORP·Filed 2003·Granted Feb 5, 2008·19 cites·34 claims
- 2468US9910796B2Programmable event driven yield mechanism which may activate other threadsINTEL CORP·Filed 2013·Granted Mar 6, 2018·1 cites·9 claims
- 2567US7228528B2Building inter-block streams from a dynamic execution trace for a programINTEL CORP·Filed 2003·Granted Jun 5, 2007·13 cites·25 claims
- 2665US8074274B2User-level privilege managementWANG HONG·Filed 2006·Granted Dec 6, 2011·3 cites·23 claims
- 2764US10635438B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2018·Granted Apr 28, 2020·0 cites·23 claims
- 2864US10628153B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2018·Granted Apr 21, 2020·0 cites·17 claims
- 2964US10613858B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2018·Granted Apr 7, 2020·0 cites·21 claims
- 3064US10534613B2Supporting learned branch predictorsINTEL CORP·Filed 2017·Granted Jan 14, 2020·1 cites·20 claims
- 3164US8095920B2Post-pass binary adaptation for software-based speculative precomputationLIAO STEVE SHIH-WEI·Filed 2002·Granted Jan 10, 2012·11 cites·47 claims
- 3263US6883089B2Method and apparatus for processing a predicated instruction using limited predicate slipINTEL CORP·Filed 2000·Granted Apr 19, 2005·9 cites·18 claims
- 3362US7603546B2System, method and apparatus for dependency chain processingINTEL CORP·Filed 2004·Granted Oct 13, 2009·10 cites·22 claims
- 3459US9952859B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2016·Granted Apr 24, 2018·0 cites·15 claims
- 3558US9785576B2Hardware-assisted virtualization for implementing secure video output pathINTEL CORP·Filed 2014·Granted Oct 10, 2017·1 cites·20 claims
- 3658US8522220B2Post-pass binary adaptation for software-based speculative precomputationSHIH-WEI LIAO STEVE·Filed 2010·Granted Aug 27, 2013·2 cites·14 claims
- 3757US7260705B2Apparatus to implement mesocodeINTEL CORP·Filed 2003·Granted Aug 21, 2007·7 cites·30 claims
- 3855US9442721B2Method and system to provide user-level multithreadingINTEL CORP·Filed 2012·Granted Sep 13, 2016·0 cites·26 claims
- 3955US9189230B2Method and system to provide concurrent user-level, non-privileged shared resource thread creation and executionGROCHOWSKI EDWARD T·Filed 2004·Granted Nov 17, 2015·3 cites·43 claims
- 4052US8868887B2Programmable event driven yield mechanism which may activate other threadsWANG HONG·Filed 2004·Granted Oct 21, 2014·1 cites·27 claims
- 4151US8380963B2Apparatus and method for enabling inter-sequencer communication following lock competition and accelerator registrationINTEL CORP·Filed 2011·Granted Feb 19, 2013·0 cites·15 claims
- 4251US7844801B2Method and apparatus for affinity-guided speculative helper threads in chip multiprocessorsINTEL CORP·Filed 2003·Granted Nov 30, 2010·2 cites·32 claims
- 4346US10324872B2Interrupt-vector translation lookaside bufferINTEL IP CORP·Filed 2016·Granted Jun 18, 2019·0 cites·17 claims
- 4446US2011067011A1Transformation of single-threaded code to speculative precomputation enabled codeWANG HONG·Filed 2010·Application pending·0 cites
- 4545US2005071438A1Methods and apparatuses for compiler-creating helper threads for multi-threadingFiled 2003·Application pending·0 cites
- 4645US2005071841A1Methods and apparatuses for thread management of mult-threadingFiled 2003·Application pending·0 cites
- 4745US2004154010A1Control-quasi-independent-points guided speculative multithreadingFiled 2003·Application pending·0 cites
- 4843US2004128489A1Transformation of single-threaded code to speculative precomputation enabled codeFiled 2002·Application pending·0 cites
- 4943US2004128483A1Fuser renamer apparatus, systems, and methodsINTEL CORP·Filed 2002·Application pending·0 cites
- 5040US11010166B2Arithmetic logic unit with normal and accelerated performance modes using differing numbers of computational circuitsINTEL CORP·Filed 2016·Granted May 18, 2021·0 cites·20 claims
Showing the top 50 of 51 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →