Inventor · disambiguated record
Philip B. James-Roxby
Also filed as: JAMES-ROXBY PHILIP · JAMES-ROXBY PHILIP B · JAMES-ROXBY PHILIP BRYN
53 granted patents·8 pending applications·1,023 citations·filing 2002–2025
99Inventor score
Files withXILINX INC49JAMES-ROXBY PHILIP B6DISNEY ENTPR INC3ADVANCED MICRO DEVICES INC2BREBNER GORDON J1
Top patents by PatentIndex Score
61 records- 0197US10802807B1Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2019·Granted Oct 13, 2020·25 cites·20 claims
- 0297US7328335B1Bootable programmable logic device for internal decoding of encoded configuration dataXILINX INC·Filed 2004·Granted Feb 5, 2008·94 cites·27 claims
- 0397US6920627B2Reconfiguration of a programmable logic device using internal controlXILINX INC·Filed 2003·Granted Jul 19, 2005·216 cites·15 claims
- 0496US11281440B1Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2020·Granted Mar 22, 2022·5 cites·20 claims
- 0596US10747690B2Device with data processing engine arrayXILINX INC·Filed 2018·Granted Aug 18, 2020·19 cites·20 claims
- 0695US9218443B1Heterogeneous multiprocessor program compilation targeting programmable integrated circuitsXILINX INC·Filed 2014·Granted Dec 22, 2015·59 cites·20 claims
- 0794US7574680B1Method and apparatus for application-specific programmable memory architecture and interconnection network on a chipXILINX INC·Filed 2007·Granted Aug 11, 2009·35 cites·6 claims
- 0893US12307217B1Dynamic adjustment of floating point exponent bias for exponent compressionXILINX INC·Filed 2021·Granted May 20, 2025·3 cites·20 claims
- 0993US8443230B1Methods and systems with transaction-level lockstepJAMES-ROXBY PHILIP B·Filed 2010·Granted May 14, 2013·44 cites·20 claims
- 1093US7689726B1Bootable integrated circuit device for readback encoding of configuration dataXILINX INC·Filed 2004·Granted Mar 30, 2010·53 cites·22 claims
- 1191US7653895B1Memory arrangement for message processing by a plurality of threadsXILINX INC·Filed 2006·Granted Jan 26, 2010·23 cites·20 claims
- 1290US11216275B1Converting floating point data into integer data using a dynamically adjusted scale factorXILINX INC·Filed 2019·Granted Jan 4, 2022·6 cites·20 claims
- 1389US7185309B1Method and apparatus for application-specific programmable memory architecture and interconnection network on a chipXILINX INC·Filed 2004·Granted Feb 27, 2007·51 cites·11 claims
- 1488US8595442B1Redundantly validating values with a processor and a check circuitJAMES-ROXBY PHILIP B·Filed 2010·Granted Nov 26, 2013·12 cites·20 claims
- 1588US7227378B2Reconfiguration of a programmable logic device using internal controlXILINX INC·Filed 2005·Granted Jun 5, 2007·15 cites·15 claims
- 1688US6883147B1Method and system for generating a circuit design including a peripheral component connected to a busXILINX INC·Filed 2002·Granted Apr 19, 2005·52 cites·14 claims
- 1787US11204745B2Dataflow graph programming environment for a heterogenous processing systemXILINX INC·Filed 2019·Granted Dec 21, 2021·4 cites·18 claims
- 1886US9678150B2Methods and circuits for debugging circuit designsXILINX INC·Filed 2015·Granted Jun 13, 2017·5 cites·20 claims
- 1986US7627291B1Integrated circuit having a routing element selectively operable to function as an antennaXILINX INC·Filed 2005·Granted Dec 1, 2009·18 cites·51 claims
- 2085US10990552B1Streaming interconnect architecture for data processing engine arrayXILINX INC·Filed 2018·Granted Apr 27, 2021·4 cites·20 claims
- 2184US10860766B1Compilation flow for a heterogeneous multi-core architectureXILINX INC·Filed 2019·Granted Dec 8, 2020·4 cites·20 claims
- 2284US8479042B1Transaction-level lockstepJAMES-ROXBY PHILIP B·Filed 2010·Granted Jul 2, 2013·8 cites·20 claims
- 2384US7228520B1Method and apparatus for a programmable interface of a soft platform on a programmable logic deviceXILINX INC·Filed 2004·Granted Jun 5, 2007·37 cites·24 claims
- 2483US11573726B1Data processing engine arrangement in a deviceXILINX INC·Filed 2020·Granted Feb 7, 2023·1 cites·8 claims
- 2582US8127262B1Communicating state data between stages of pipelined packet processorJAMES-ROXBY PHILIP B·Filed 2008·Granted Feb 28, 2012·11 cites·19 claims
- 2681US7990867B1Pipeline for processing network packetsXILINX INC·Filed 2007·Granted Aug 2, 2011·9 cites·20 claims
- 2781US7552042B1Method for message processing on a programmable logic deviceXILINX INC·Filed 2004·Granted Jun 23, 2009·26 cites·20 claims
- 2880US7131077B1Using an embedded processor to implement a finite state machineXILINX INC·Filed 2003·Granted Oct 31, 2006·28 cites·18 claims
- 2979US7823162B1Thread circuits and a broadcast channel in programmable logicXILINX INC·Filed 2005·Granted Oct 26, 2010·9 cites·15 claims
- 3079US7698449B1Method and apparatus for configuring a processor embedded in an integrated circuit for use as a logic elementXILINX INC·Filed 2005·Granted Apr 13, 2010·9 cites·18 claims
- 3178US7133978B1Method and apparatus for processing data stored in a memory shared among a plurality of processorsXILINX INC·Filed 2003·Granted Nov 7, 2006·27 cites·10 claims
- 3277US9288252B2Managing web services using a reverse proxyDISNEY ENTPR INC·Filed 2013·Granted Mar 15, 2016·5 cites·27 claims
- 3377US8065130B1Method for message processing on a programmable logic deviceBREBNER GORDON J·Filed 2009·Granted Nov 22, 2011·6 cites·11 claims
- 3476US9846660B2Heterogeneous multiprocessor platform targeting programmable integrated circuitsXILINX INC·Filed 2014·Granted Dec 19, 2017·5 cites·20 claims
- 3575US7792117B1Method for simulating a processor of network packetsXILINX INC·Filed 2007·Granted Sep 7, 2010·6 cites·18 claims
- 3674US7784014B1Generation of a specification of a network packet processorXILINX INC·Filed 2007·Granted Aug 24, 2010·7 cites·20 claims
- 3772US12200087B2Dynamic data conversion for network computer systemsXILINX INC·Filed 2022·Granted Jan 14, 2025·0 cites·20 claims
- 3872US11687327B2Control and reconfiguration of data flow graphs on heterogeneous computing platformXILINX INC·Filed 2022·Granted Jun 27, 2023·0 cites·20 claims
- 3971US7770179B1Method and apparatus for multithreading on a programmable logic deviceXILINX INC·Filed 2004·Granted Aug 3, 2010·16 cites·11 claims
- 4071US6621295B1Reconfigurable priority encodingXILINX INC·Filed 2002·Granted Sep 16, 2003·17 cites·13 claims
- 4170US9325602B2Low-risk deployment of web servicesDISNEY ENTPR INC·Filed 2013·Granted Apr 26, 2016·3 cites·16 claims
- 4269US8122239B1Method and apparatus for initializing a system configured in a programmable logic deviceJAMES-ROXBY PHILIP B·Filed 2008·Granted Feb 21, 2012·6 cites·20 claims
- 4368US8032874B1Generation of executable threads having source code specifications that describe network packetsXILINX INC·Filed 2006·Granted Oct 4, 2011·4 cites·15 claims
- 4467US7028283B1Method of using a hardware library in a programmable logic deviceXILINX INC·Filed 2003·Granted Apr 11, 2006·11 cites·22 claims
- 4566US7788402B1Circuit for modification of a network packet by insertion or removal of a data segmentXILINX INC·Filed 2007·Granted Aug 31, 2010·3 cites·19 claims
- 4666US7552405B1Methods of implementing embedded processor systems including state machinesXILINX INC·Filed 2007·Granted Jun 23, 2009·3 cites·20 claims
- 4766US7139995B1Integration of a run-time parameterizable core with a static circuit designXILINX INC·Filed 2002·Granted Nov 21, 2006·12 cites·14 claims
- 4866US2025150520A1Dynamic data conversion for network computer systemsXILINX INC·Filed 2025·Application pending·0 cites
- 4963US2022058005A1Dataflow graph programming environment for a heterogenous processing systemXILINX INC·Filed 2021·Application pending·0 cites
- 5062US7949793B1Method and apparatus for providing an interface between a programmable circuit and a processorXILINX INC·Filed 2005·Granted May 24, 2011·2 cites·17 claims
Showing the top 50 of 61 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →