Inventor · disambiguated record
Philip L. Vitale
Also filed as: VITALE PHILIP L · VITALE PHILIP LEE
20 granted patents·63 citations·filing 1994–2018
92Inventor score
Technology areasG06F
Top patents by PatentIndex Score
20 records- 0179US9298651B2Continuous in-memory accumulation of hardware performance counter dataIBM·Filed 2013·Granted Mar 29, 2016·5 cites·20 claims
- 0276US8793482B2Automatic configuration sampling for managing configuration parameters of a computer systemIBM·Filed 2013·Granted Jul 29, 2014·4 cites·16 claims
- 0376US8161493B2Weighted-region cycle accounting for multi-threaded processor coresFLOYD MICHAEL S·Filed 2008·Granted Apr 17, 2012·8 cites·18 claims
- 0476US6681321B1Method system and apparatus for instruction execution tracing with out of order processorsIBM·Filed 2000·Granted Jan 20, 2004·28 cites·43 claims
- 0575US10002063B2Monitoring performance of multithreaded workloadsIBM·Filed 2015·Granted Jun 19, 2018·2 cites·18 claims
- 0668US9298580B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2014·Granted Mar 29, 2016·1 cites·7 claims
- 0768US8719561B2Automatic configuration sampling for managing configuration parameters of a computer systemFRANCOIS CHRISTOPHER·Filed 2010·Granted May 6, 2014·3 cites·8 claims
- 0862US10754749B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2018·Granted Aug 25, 2020·0 cites·3 claims
- 0960US10031827B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2017·Granted Jul 24, 2018·0 cites·20 claims
- 1058US7620801B2Methods to randomly or pseudo-randomly, without bias, select instruction for performance analysis in a microprocessorIBM·Filed 2005·Granted Nov 17, 2009·1 cites·5 claims
- 1157US10895947B2System-wide topology and performance monitoring GUI tool with per-partition viewsIBM·Filed 2018·Granted Jan 19, 2021·0 cites·20 claims
- 1257US9760465B2Assessment of processor performance metrics by monitoring probes constructed using instruction sequencesIBM·Filed 2014·Granted Sep 12, 2017·0 cites·9 claims
- 1355US9292403B2System-wide topology and performance monitoring GUI tool with per-partition viewsBOSTIC WILLIAM A·Filed 2011·Granted Mar 22, 2016·1 cites·23 claims
- 1454US9110708B2Region-weighted accounting of multi-threaded processor core according to dispatch stateIBM·Filed 2013·Granted Aug 18, 2015·0 cites·7 claims
- 1553US9612974B2Storing service level agreement compliance dataIBM·Filed 2015·Granted Apr 4, 2017·0 cites·10 claims
- 1652US9600336B1Storing service level agreement compliance dataIBM·Filed 2015·Granted Mar 21, 2017·0 cites·15 claims
- 1751US10146396B2System-wide topology and performance monitoring GUI tool with per-partition viewsIBM·Filed 2016·Granted Dec 4, 2018·0 cites·20 claims
- 1849US9015449B2Region-weighted accounting of multi-threaded processor core according to dispatch stateBISHOP JAMES WILSON·Filed 2011·Granted Apr 21, 2015·0 cites·21 claims
- 1943US9952956B2Calculating the clock frequency of a processorIBM·Filed 2015·Granted Apr 24, 2018·0 cites·20 claims
- 2037US5623616AFloating point operaton throughput controlHEWLETT PACKARD CO·Filed 1994·Granted Apr 22, 1997·10 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →