Inventor · disambiguated record
Pierre Caubet
Also filed as: CAUBET PIERRE
16 granted patents·73 citations·filing 2005–2017
90Inventor score
Files withST MICROELECTRONICS SA8ST MICROELECTRONICS CROLLES 2 SAS5ST MICROELECTRONICS CROLLES 22CAUBET PIERRE1
Top patents by PatentIndex Score
16 records- 0192US7601636B2Implementation of a metal barrier in an integrated electronic circuitST MICROELECTRONICS SA·Filed 2007·Granted Oct 13, 2009·53 cites·17 claims
- 0282US9691871B1Process for forming a layer of equiaxed titanium nitride and a MOSFET device having a metal gate electrode including a layer of equiaxed titanium nitrideST MICROELECTRONICS CROLLES 2 SAS·Filed 2015·Granted Jun 27, 2017·5 cites·18 claims
- 0377US8013284B2Integrated electrooptic systemST MICROELECTRONICS SA·Filed 2010·Granted Sep 6, 2011·2 cites·16 claims
- 0472US7851915B2Electronic component comprising a titanium carbonitride (TiCN) barrier layer and process of making the sameST MICROELECTRONICS SA·Filed 2008·Granted Dec 14, 2010·6 cites·17 claims
- 0572US7667173B2Integrated electrooptic systemST MICROELECTRONICS SA·Filed 2007·Granted Feb 23, 2010·3 cites·22 claims
- 0665US9257518B2Method for producing a metal-gate MOS transistor, in particular a PMOS transistor, and corresponding integrated circuitST MICROELECTRONICS CROLLES 2·Filed 2014·Granted Feb 9, 2016·2 cites·18 claims
- 0762US9536599B1Optoelectronic device, in particular memory deviceST MICROELECTRONICS CROLLES 2 SAS·Filed 2016·Granted Jan 3, 2017·0 cites·21 claims
- 0862US9530489B2Optoelectronic device, in particular memory deviceST MICROELECTRONICS CROLLES 2 SAS·Filed 2014·Granted Dec 27, 2016·0 cites·29 claims
- 0962US9029254B2Method for depositing a low-diffusion TiAlN layer and insulated gate comprising such a layerST MICROELECTRONICS CROLLES 2·Filed 2013·Granted May 12, 2015·1 cites·12 claims
- 1054US7687399B2Production of a self-aligned CuSiN barrierST MICROELECTRONICS SA·Filed 2006·Granted Mar 30, 2010·1 cites·22 claims
- 1150US8053871B2Implementation of a metal barrier in an integrated electronic circuitST MICROELECTRONICS SA·Filed 2009·Granted Nov 8, 2011·0 cites·28 claims
- 1249US10211059B2Process for forming a layer of equiaxed titanium nitride and a MOSFET device having a metal gate electrode including a layer of equiaxed titanium nitrideST MICROELECTRONICS CROLLES 2 SAS·Filed 2017·Granted Feb 19, 2019·0 cites·20 claims
- 1348US9953837B2Transistor having a gate comprising a titanium nitride layer and method for depositing this layerST MICROELECTRONICS CROLLES 2 SAS·Filed 2015·Granted Apr 24, 2018·0 cites·19 claims
- 1444US9000596B2Transistors having a gate comprising a titanium nitride layerCAUBET PIERRE·Filed 2012·Granted Apr 7, 2015·0 cites·7 claims
- 1543US8018062B2Production of a self-aligned CuSiN barrierST MICROELECTRONICS SA·Filed 2010·Granted Sep 13, 2011·0 cites·19 claims
- 1639US7531447B2Process for forming integrated circuit comprising copper linesST MICROELECTRONICS SA·Filed 2005·Granted May 12, 2009·0 cites·6 claims
Join the waitlist — get patent alerts
Get an alert when Pierre Caubet files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →