Inventor · disambiguated record
Przemek Guzy
Also filed as: GUZY PRZEMEK
5 granted patents·5 pending applications·24 citations·filing 2002–2025
76Inventor score
Top patents by PatentIndex Score
10 records- 0167US8141018B1Method and apparatus for using slack potential data to design a system on a field programmable gate arrayGUZY PRZEMEK·Filed 2009·Granted Mar 20, 2012·5 cites·22 claims
- 0263US8443334B1Method and apparatus for generating graphical representations of slack potential for slack pathsGUZY PRZEMEK·Filed 2012·Granted May 14, 2013·2 cites·20 claims
- 0362US7197734B1Method and apparatus for designing systems using logic regionsALTERA CORP·Filed 2002·Granted Mar 27, 2007·12 cites·30 claims
- 0461US8661329B1Generation of readable hierarchical path identifiersTEPER MARK ARI·Filed 2010·Granted Feb 25, 2014·3 cites·11 claims
- 0561US2025226818A1Techniques For Routing Between A Network-On-Chip And Multiplexer Circuits In A Central Region Of An Integrated CircuitALTERA CORP·Filed 2025·Application pending·0 cites
- 0657US7657857B2Performance visualization of delay in circuit designALTERA CORP·Filed 2008·Granted Feb 2, 2010·2 cites·10 claims
- 0756US2025139047A1Dynamic Initiator Throttling in Network-on-ChipALTERA CORP·Filed 2024·Application pending·0 cites
- 0852US2023342313A1Systems And Methods For Load Balancing Memory TrafficINTEL CORP·Filed 2023·Application pending·0 cites
- 0947US2022221986A1Fabric memory network-on-chipWEBER SCOTT JEREMY·Filed 2022·Application pending·0 cites
- 1030US2012110400A1Method and Apparatus for Performing Memory Interface CalibrationMANOHARARAJAH VALAVAN·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →