Inventor · disambiguated record
Prathamesh Raghunath Shinde
Also filed as: SHINDE PRATHAMESH RAGHUNATH
2 granted patents·10 pending applications·0 citations·filing 2021–2025
27Inventor score
Files withINTEL CORP12
Top patents by PatentIndex Score
12 records- 0172US2025130848A1Barrier state save and restore for preemption in a graphics environmentINTEL CORP·Filed 2024·Application pending·0 cites
- 0269US2025272777A1Providing native support for generic pointers in a graphics processing unitINTEL CORP·Filed 2025·Application pending·0 cites
- 0366US12299766B2Providing native support for generic pointers in a graphics processing unitINTEL CORP·Filed 2021·Granted May 13, 2025·0 cites·20 claims
- 0463US12164952B2Barrier state save and restore for preemption in a graphics environmentINTEL CORP·Filed 2021·Granted Dec 10, 2024·0 cites·25 claims
- 0551US2024281249A1Load store cache microarchitectureINTEL CORP·Filed 2023·Application pending·0 cites
- 0648US2024160478A1Increasing processing resources in processing cores of a graphics environmentINTEL CORP·Filed 2022·Application pending·0 cites
- 0748US2024211403A1Load store microarchitecture cache enhancementsINTEL CORP·Filed 2022·Application pending·0 cites
- 0846US2024069737A1Merging bit-mask atomics to the same dwordINTEL CORP·Filed 2022·Application pending·0 cites
- 0946US2024087077A1Merging atomics to the same cache lineINTEL CORP·Filed 2022·Application pending·0 cites
- 1045US2023104845A1Graphics processor memory access architecture with address sortingINTEL CORP·Filed 2021·Application pending·0 cites
- 1144US2023028666A1Performing global memory atomics in a private cache of a sub-core of a graphics processing unitINTEL CORP·Filed 2021·Application pending·0 cites
- 1243US2022413854A164-bit two-dimensional block load with transposeINTEL CORP·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →