Inventor · disambiguated record
Radu Barsan
Also filed as: BARSAN RADU · BARSAN RADU M
17 granted patents·1 pending application·677 citations·filing 1995–2010
95Inventor score
Top patents by PatentIndex Score
18 records- 0192US5646901ACMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistorsADVANCED MICRO DEVICES INC·Filed 1996·Granted Jul 8, 1997·102 cites·13 claims
- 0292US5587945ACMOS EEPROM cell with tunneling window in the read pathADVANCED MICRO DEVICES INC·Filed 1995·Granted Dec 24, 1996·108 cites·6 claims
- 0389US5942780AIntegrated circuit having, and process providing, different oxide layer thicknesses on a substrateADVANCED MICRO DEVICES INC·Filed 1996·Granted Aug 24, 1999·64 cites·6 claims
- 0489US5672521AMethod of forming multiple gate oxide thicknesses on a wafer substrateADVANCED MICRO DEVICES INC·Filed 1995·Granted Sep 30, 1997·80 cites·24 claims
- 0583US5615150AControl gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistorsADVANCED MICRO DEVICES INC·Filed 1995·Granted Mar 25, 1997·50 cites·18 claims
- 0679US5959336ADecoder circuit with short channel depletion transistorsADVANCED MICRO DEVICES INC·Filed 1996·Granted Sep 28, 1999·47 cites·9 claims
- 0779US5854114AData retention of EEPROM cell with shallow trench isolation using thicker liner oxideADVANCED MICRO DEVICES INC·Filed 1997·Granted Dec 29, 1998·50 cites·14 claims
- 0878US6071784AAnnealing of silicon oxynitride and silicon nitride films to eliminate high temperature charge lossADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 6, 2000·53 cites·31 claims
- 0977US5761116AVpp only scalable EEPROM memory cell having transistors with thin tunnel gate oxideADVANCED MICRO DEVICES INC·Filed 1996·Granted Jun 2, 1998·38 cites·12 claims
- 1070US5594687ACompletely complementary MOS memory cell with tunneling through the NMOS and PMOS transistors during program and eraseADVANCED MICRO DEVICES INC·Filed 1995·Granted Jan 14, 1997·26 cites·9 claims
- 1166US6064105AData retention of EEPROM cell with shallow trench isolation using thicker liner oxideVANTIS CORP·Filed 1998·Granted May 16, 2000·28 cites·3 claims
- 1258US8358889B2Device fabrication with planar bragg gratings suppressing parasitic effectsRedfern Integrated Optics·Filed 2010·Granted Jan 22, 2013·1 cites·16 claims
- 1353US5830795ASimplified masking process for programmable logic device manufactureADVANCED MICRO DEVICES INC·Filed 1996·Granted Nov 3, 1998·14 cites·25 claims
- 1438US5700698AMethod for screening non-volatile memory and programmable logic devicesADVANCED MICRO DEVICES INC·Filed 1995·Granted Dec 23, 1997·5 cites·21 claims
- 1537US5908308AUse of borophosphorous tetraethyl orthosilicate (BPTEOS) to improve isolation in a transistor arrayADVANCED MICRO DEVICES INC·Filed 1997·Granted Jun 1, 1999·6 cites·7 claims
- 1636US6211022B1Field leakage by using a thin layer of nitride deposited by chemical vapor depositionADVANCED MICRO DEVICES INC·Filed 1999·Granted Apr 3, 2001·4 cites·6 claims
- 1731US5841701AMethod of charging and discharging floating gage transistors to reduce leakage currentADVANCED MICRO DEVICES INC·Filed 1997·Granted Nov 24, 1998·1 cites·19 claims
- 1830US2002000626A1Improving field leakage by using a thin layer of nitride deposited by chemical vapor depositionADVANCED MICRO DEVICES INC·Filed 1997·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →