Inventor · disambiguated record
Razvan Peter Figuli
Also filed as: FIGULI RAZVAN PETER
15 granted patents·3 pending applications·25 citations·filing 2018–2022
85Inventor score
Files withIBM18
Top patents by PatentIndex Score
18 records- 0194US10169451B1Rapid character substring searchingIBM·Filed 2018·Granted Jan 1, 2019·22 cites·16 claims
- 0276US10732972B2Non-overlapping substring detection within a data element stringIBM·Filed 2018·Granted Aug 4, 2020·2 cites·20 claims
- 0368US10747819B2Rapid partial substring matchingIBM·Filed 2018·Granted Aug 18, 2020·1 cites·14 claims
- 0461US11663270B2Vector string search instructionIBM·Filed 2021·Granted May 30, 2023·0 cites·19 claims
- 0559US12399743B2Padding input data for artificial intelligence acceleratorsIBM·Filed 2022·Granted Aug 26, 2025·0 cites·24 claims
- 0657US11068541B2Vector string search instructionIBM·Filed 2019·Granted Jul 20, 2021·0 cites·16 claims
- 0756US11782683B1Variable replacement by an artificial intelligence acceleratorIBM·Filed 2022·Granted Oct 10, 2023·0 cites·20 claims
- 0854US11099602B2Fault-tolerant clock gatingIBM·Filed 2019·Granted Aug 24, 2021·0 cites·20 claims
- 0954US11042371B2Plausability-driven fault detection in result logic and condition codes for fast exact substring matchIBM·Filed 2019·Granted Jun 22, 2021·0 cites·20 claims
- 1052US10996951B2Plausibility-driven fault detection in string termination logic for fast exact substring matchIBM·Filed 2019·Granted May 4, 2021·0 cites·20 claims
- 1149US10831496B2Method to execute successive dependent instructions from an instruction stream in a processorIBM·Filed 2019·Granted Nov 10, 2020·0 cites·20 claims
- 1248US11210064B2Parallelized rounding for decimal floating point to binary coded decimal conversionIBM·Filed 2019·Granted Dec 28, 2021·0 cites·20 claims
- 1345US10782968B2Rapid substring detection within a data element stringIBM·Filed 2018·Granted Sep 22, 2020·0 cites·20 claims
- 1445US2023129750A1Performing a floating-point multiply-add operation in a computer implemented environmentIBM·Filed 2021·Application pending·0 cites
- 1542US2020264877A1Load/store elements reversed instructionsIBM·Filed 2019·Application pending·0 cites
- 1642US2020264883A1Load/store bytes reversed elements instructionsIBM·Filed 2019·Application pending·0 cites
- 1741US11221826B2Parallel rounding for conversion from binary floating point to binary coded decimalIBM·Filed 2019·Granted Jan 11, 2022·0 cites·20 claims
- 1838US11159183B2Residue checking of entire normalizer output of an extended resultIBM·Filed 2019·Granted Oct 26, 2021·0 cites·9 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →