Inventor · disambiguated record
Rajiv Kapur
Also filed as: KAPUR RAJIV
5 granted patents·327 citations·filing 1998–2004
83Inventor score
Top patents by PatentIndex Score
5 records- 0191US6240542B1Poly routing for chip interconnects with minimal impact on chip performanceLSI LOGIC CORP·Filed 1998·Granted May 29, 2001·251 cites·47 claims
- 0285US7231370B1Method and apparatus for organizational software license sharingLSI CORP·Filed 2004·Granted Jun 12, 2007·47 cites·15 claims
- 0366US6594807B1Method for minimizing clock skew for an integrated circuitLSI LOGIC CORP·Filed 2001·Granted Jul 15, 2003·13 cites·7 claims
- 0462US6480994B1Balanced clock placement for integrated circuits containing megacellsLSI LOGIC CORP·Filed 2001·Granted Nov 12, 2002·9 cites·6 claims
- 0559US6725389B1Method for minimizing clock skew by relocating a clock buffer until clock skew is within a tolerable limitLSI LOGIC CORP·Filed 2000·Granted Apr 20, 2004·7 cites·7 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →