Inventor · disambiguated record
Rafael Reif
Also filed as: REIF RAFAEL
7 granted patents·3 pending applications·456 citations·filing 1995–2007
89Inventor score
Top patents by PatentIndex Score
10 records- 0197US7067909B2Multi-layer integrated semiconductor structure having an electrical shielding portionMASSACHUSETTS INST TECHNOLOGY·Filed 2003·Granted Jun 27, 2006·245 cites·19 claims
- 0294US7307003B2Method of forming a multi-layer semiconductor structure incorporating a processing handle memberMASSACHUSETTS INST TECHNOLOGY·Filed 2003·Granted Dec 11, 2007·101 cites·45 claims
- 0385US7480879B2Substrate noise toolMASSACHUSETTS INST TECHNOLOGY·Filed 2006·Granted Jan 20, 2009·17 cites·12 claims
- 0481US5828084AHigh performance poly-SiGe thin film transistorSONY CORP·Filed 1995·Granted Oct 27, 1998·46 cites·20 claims
- 0579US6638797B2High performance poly-SiGe thin film transistor and a method of fabricating such a thin film transistorSONY CORP·Filed 2002·Granted Oct 28, 2003·23 cites·13 claims
- 0668US7064055B2Method of forming a multi-layer semiconductor structure having a seamless bonding interfaceMASSACHUSETTS INST TECHNOLOGY·Filed 2003·Granted Jun 20, 2006·15 cites·30 claims
- 0748US2008064183A1Method of forming a multi-layer semiconductor structure incorporating a processing handle memberREIF RAFAEL·Filed 2007·Application pending·0 cites
- 0847US6444509B1High performance poly-si1−xgex thin film transistor and a method of fabricating such a thin film transistorSONY CORP·Filed 1997·Granted Sep 3, 2002·9 cites·13 claims
- 0942US2006099796A1Method of forming a multi-layer semiconductor structure having a seam-less bonding interfaceREIF RAFAEL·Filed 2005·Application pending·0 cites
- 1029US2004124538A1Multi-layer integrated semiconductor structureFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →