Inventor · disambiguated record
Ranjit J. Rozario
Also filed as: ROZARIO RANJIT · ROZARIO RANJIT J · ROZARIO RANJIT JOSEPH
26 granted patents·4 pending applications·338 citations·filing 1994–2022
96Inventor score
Files withIMAGINATION TECH LTD8MIPS TECH LLC6REDBACK NETWORKS INC5ADVANCED MICRO DEVICES INC3PATEL SANJAY2
Top patents by PatentIndex Score
30 records- 0197US10642501B1Hardware virtualized input output memory management unitMIPS TECH LLC·Filed 2015·Granted May 5, 2020·31 cites·28 claims
- 0287US11599270B2Virtualized-in-hardware input output memory managementMIPS TECH LLC·Filed 2020·Granted Mar 7, 2023·2 cites·26 claims
- 0381US9830275B2Translation lookaside bufferIMAGINATION TECH LTD·Filed 2015·Granted Nov 28, 2017·3 cites·24 claims
- 0479US9367286B2Crossing pipelined data between circuitry in different clock domainsIMAGINATION TECH LTD·Filed 2014·Granted Jun 14, 2016·4 cites·20 claims
- 0579US6618793B2Free memory manager scheme and cacheREDBACK NETWORKS INC·Filed 2000·Granted Sep 9, 2003·25 cites·28 claims
- 0678US7986706B2Hierarchical pipelined distributed scheduling traffic managerERICSSON TELEFON AB L M·Filed 2009·Granted Jul 26, 2011·9 cites·23 claims
- 0778US5745732AComputer system including system controller with a write buffer and plural read buffers for decoupled bussesFiled 1994·Granted Apr 28, 1998·78 cites·27 claims
- 0877US9086906B2Apparatus and method for guest and root register sharing in a virtual machinePATEL SANJAY·Filed 2012·Granted Jul 21, 2015·5 cites·15 claims
- 0976US11907542B2Virtualized-in-hardware input output memory managementMIPS TECH LLC·Filed 2022·Granted Feb 20, 2024·0 cites·20 claims
- 1075US7352748B1Updating of routing data in a network elementREDBACK NETWORKS INC·Filed 2002·Granted Apr 1, 2008·20 cites·35 claims
- 1170US6173378B1Method for ordering a request for access to a system memory using a reordering buffer or FIFOADVANCED MICRO DEVICES INC·Filed 1998·Granted Jan 9, 2001·57 cites·15 claims
- 1269US7206310B1Method and apparatus for replicating packet data with a network elementREDBACK NETWORKS INC·Filed 2001·Granted Apr 17, 2007·13 cites·11 claims
- 1366US6345328B1Gear box for multiple clock domainsADVANCED MICRO DEVICES INC·Filed 1999·Granted Feb 5, 2002·48 cites·37 claims
- 1464US10649773B2Processors supporting atomic writes to multiword memory locations and methodsMIPS TECH LLC·Filed 2016·Granted May 12, 2020·1 cites·12 claims
- 1564US10108548B2Processors and methods for cache sparing storesIMAGINATION TECH LTD·Filed 2015·Granted Oct 23, 2018·1 cites·21 claims
- 1662US6961822B2Free memory manager scheme and cacheREDBACK NETWORKS INC·Filed 2003·Granted Nov 1, 2005·7 cites·15 claims
- 1760US7254651B2Scheduler for a direct memory access device having multiple channelsREDBACK NETWORKS INC·Filed 2000·Granted Aug 7, 2007·7 cites·24 claims
- 1857US10185665B2Translation lookaside bufferMIPS TECH LLC·Filed 2017·Granted Jan 22, 2019·0 cites·16 claims
- 1953US10162659B2Embedded processor with virtualized security controls using guest identifications, a common kernel address space and operational permissionsARM FINANCE OVERSEAS LTD·Filed 2015·Granted Dec 25, 2018·0 cites·7 claims
- 2053US9740454B2Crossing pipelined data between circuitry in different clock domainsIMAGINATION TECH LTD·Filed 2016·Granted Aug 22, 2017·0 cites·15 claims
- 2153US6253262B1Arbitrating FIFO implementation which positions input request in a buffer according to its statusADVANCED MICRO DEVICES INC·Filed 1998·Granted Jun 26, 2001·27 cites·23 claims
- 2252US9223721B2Embedded processor with virtualized security controls using guest identifications, a common kernel address space and operational permissionsPATEL SANJAY·Filed 2012·Granted Dec 29, 2015·0 cites·12 claims
- 2342US10671391B2Modeless instruction execution with 64/32-bit addressingMIPS TECH LLC·Filed 2015·Granted Jun 2, 2020·0 cites·23 claims
- 2441US2012331265A1Apparatus and Method for Accelerated Hardware Page Table WalkROZARIO RANJIT JOSEPH·Filed 2011·Application pending·0 cites
- 2539US9740557B2Pipelined ECC-protected memory accessIMAGINATION TECH LTD·Filed 2015·Granted Aug 22, 2017·0 cites·13 claims
- 2638US2017293556A1Read discards in a processor system with write-back cachesIMAGINATION TECH LTD·Filed 2016·Application pending·0 cites
- 2731US8897316B2On-chip packet cut-throughCHEN EDMUND·Filed 2010·Granted Nov 25, 2014·0 cites·16 claims
- 2831US2017293646A1Apparatus and methods for out of order item selection and status updatingIMAGINATION TECH LTD·Filed 2016·Application pending·0 cites
- 2930US2017123792A1Processors Supporting Endian Agnostic SIMD Instructions and MethodsIMAGINATION TECH LTD·Filed 2015·Application pending·0 cites
- 3026US8700874B2Digital counter segmented into short and long access time memoryCHEN EDMUND G·Filed 2010·Granted Apr 15, 2014·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →