Inventor · disambiguated record
Rajen S. Sidhu
Also filed as: SIDHU RAJEN · SIDHU RAJEN S · SIDHU RAJEN SINGH
15 granted patents·7 pending applications·78 citations·filing 2009–2023
90Inventor score
Top patents by PatentIndex Score
22 records- 0194US8896110B2Paste thermal interface materialsINTEL CORP·Filed 2013·Granted Nov 25, 2014·30 cites·27 claims
- 0288US10651108B2Foam compositeINTEL CORP·Filed 2016·Granted May 12, 2020·4 cites·7 claims
- 0385US8920934B2Hybrid solder and filled paste in microelectronic packagingJIANG HONGJIN·Filed 2013·Granted Dec 30, 2014·17 cites·16 claims
- 0485US8809181B2Multi-solder techniques and configurations for integrated circuit package assemblyINTEL CORP·Filed 2012·Granted Aug 19, 2014·7 cites·10 claims
- 0582US8701281B2Substrate metallization and ball attach metallurgy with a novel dopant elementSIDHU RAJEN S·Filed 2009·Granted Apr 22, 2014·11 cites·7 claims
- 0675US9461014B2Methods of forming ultra thin package structures including low temperature solder and structures formed therbyINTEL CORP·Filed 2015·Granted Oct 4, 2016·2 cites·26 claims
- 0775US9257405B2Multi-solder techniques and configurations for integrated circuit package assemblyINTEL CORP·Filed 2014·Granted Feb 9, 2016·3 cites·12 claims
- 0863US9064971B2Methods of forming ultra thin package structures including low temperature solder and structures formed therbyINTEL CORP·Filed 2012·Granted Jun 23, 2015·1 cites·16 claims
- 0962US9613933B2Package structure to enhance yield of TMI interconnectionsDE BONIS THOMAS J·Filed 2014·Granted Apr 4, 2017·2 cites·20 claims
- 1060US9394619B2Methods of adding dopants to conductive interconnect structures in substrate technologies and structures formed therebyINTEL CORP·Filed 2013·Granted Jul 19, 2016·0 cites·23 claims
- 1158US9024453B2Functional material systems and processes for package-level interconnectsSIDHU RAJEN S·Filed 2012·Granted May 5, 2015·1 cites·30 claims
- 1258US2025079328A1Molded core substrate for embedding componentsADVANCED MICRO DEVICES INC·Filed 2023·Application pending·0 cites
- 1352US10049971B2Package structure to enhance yield of TMI interconnectionsINTEL CORP·Filed 2017·Granted Aug 14, 2018·0 cites·3 claims
- 1451US2025098184A1Hybrid methods and structures for increasing capacitance density in integrated passive devicesADVANCED MICRO DEVICES INC·Filed 2023·Application pending·0 cites
- 1551US2025096161A1Methods and structures for increasing capacitance density in integrated passive devicesADVANCED MICRO DEVICES INC·Filed 2023·Application pending·0 cites
- 1649US2018236609A1Hybrid low metal loading fluxINTEL CORP·Filed 2018·Application pending·0 cites
- 1745US9950393B2Hybrid low metal loading fluxSIDHU RAJEN S·Filed 2011·Granted Apr 24, 2018·0 cites·25 claims
- 1843US2014175160A1Solder paste material technology for elimination of high warpage surface mount assembly defectsSIDHU RAJEN S·Filed 2012·Application pending·0 cites
- 1942US9283641B2Flux materials for heated solder placement and associated techniques and configurationsINTEL CORP·Filed 2012·Granted Mar 15, 2016·0 cites·26 claims
- 2039US2016260679A1Hybrid interconnect for low temperature attachINTEL CORP·Filed 2014·Application pending·0 cites
- 2137US8895365B2Techniques and configurations for surface treatment of an integrated circuit substrateRAMALINGAM SURIYAKALA·Filed 2012·Granted Nov 25, 2014·0 cites·10 claims
- 2231US2014151096A1Low temperature/high temperature solder hybrid solder interconnectsJIANG HONGJIN·Filed 2012·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →