Inventor · disambiguated record
Rajinder Singh
Also filed as: SINGH RAJINDER · SINGH RAJINDER P · SINGH RAJINDER PAUL
17 granted patents·3 pending applications·289 citations·filing 1979–2024
94Inventor score
Files withIBM10TAIWAN SEMICONDUCTOR MFG CO LTD2TEXAS INSTRUMENTS INC2UNIV CALIFORNIA2FTD SOLUTIONS PTE LTD1
Top patents by PatentIndex Score
20 records- 0189US10867681B2SRAM memory having subarrays with common IO blockTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Dec 15, 2020·10 cites·20 claims
- 0284US5699288ACompare circuit for content-addressable memoriesIBM·Filed 1996·Granted Dec 16, 1997·59 cites·11 claims
- 0383US7492849B2Single-VCO CDR for TMDS data at gigabit rateFTD SOLUTIONS PTE LTD·Filed 2005·Granted Feb 17, 2009·28 cites·22 claims
- 0481US10071345B2Polybenzimidazole hollow fiber membranes and method for making an asymmetric hollow fiber membraneLOS ALAMOS NAT SECURITY LLC·Filed 2016·Granted Sep 11, 2018·5 cites·30 claims
- 0575US7330936B2System and method for power efficient memory cachingTEXAS INSTRUMENTS INC·Filed 2005·Granted Feb 12, 2008·7 cites·18 claims
- 0666US4285099ASquid processing machineUNIV CALIFORNIA·Filed 1979·Granted Aug 25, 1981·17 cites·18 claims
- 0763US5787478AMethod and system for implementing a cache coherency mechanism for utilization within a non-inclusive cache memory hierarchyIBM·Filed 1997·Granted Jul 28, 1998·43 cites·18 claims
- 0861US2025339846A1Method to improve sorbent lifetime for direct air captureTRIAD NAT SECURITY LLC·Filed 2024·Application pending·0 cites
- 0955US5802567AMechanism for managing offset and aliasing conditions within a content-addressable memory-based cache memoryIBM·Filed 1996·Granted Sep 1, 1998·30 cites·10 claims
- 1054US2021134371A1Sram memory having subarrays with common io blockTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Application pending·0 cites
- 1149US6240487B1Integrated cache buffersIBM·Filed 1998·Granted May 29, 2001·22 cites·16 claims
- 1245US5937429ACache memory having a selectable cache-line replacement scheme using cache-line registers in a ring configuration with a token indicatorIBM·Filed 1997·Granted Aug 10, 1999·20 cites·17 claims
- 1345US5761714ASingle-cycle multi-accessible interleaved cacheIBM·Filed 1996·Granted Jun 2, 1998·18 cites·15 claims
- 1441US5905999ACache sub-array arbitrationIBM·Filed 1996·Granted May 18, 1999·13 cites·23 claims
- 1541US2006200649A1Data alignment and sign extension in a processorTEXAS INSTRUMENTS INC·Filed 2005·Application pending·0 cites
- 1639US6814487B2Apparatus for measuring internal temperatures of food pattiesUNIV CALIFORNIA·Filed 2003·Granted Nov 9, 2004·3 cites·47 claims
- 1738US6041390AToken mechanism for cache-line replacement within a cache memory having redundant cache linesIBM·Filed 1996·Granted Mar 21, 2000·9 cites·14 claims
- 1832US6304939B1Token mechanism for cache-line replacement within a cache memory having redundant cache linesIBM·Filed 1999·Granted Oct 16, 2001·3 cites·11 claims
- 1931US6064245ADynamic circuit for capturing data with wide reset toleranceIBM·Filed 1998·Granted May 16, 2000·2 cites·10 claims
- 2026US10957928B2Method for measuring and controlling methanol concentration in a methanol fuel cellOORJA CORP·Filed 2016·Granted Mar 23, 2021·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →