Inventor · disambiguated record
Reidar Stief
Also filed as: STIEF REIDAR
4 granted patents·1 pending application·27 citations·filing 2002–2002
72Inventor score
Files withINFINEON TECHNOLOGIES AG4
Top patents by PatentIndex Score
5 records- 0153US7327766B2Circuit configuration for receiving a data signalINFINEON TECHNOLOGIES AG·Filed 2002·Granted Feb 5, 2008·10 cites·7 claims
- 0253US6586978B2Delay locked loopINFINEON TECHNOLOGIES AG·Filed 2002·Granted Jul 1, 2003·10 cites·9 claims
- 0350US6639861B2Integrated memory and method for testing an integrated memoryINFINEON TECHNOLOGIES AG·Filed 2002·Granted Oct 28, 2003·7 cites·7 claims
- 0428US6774688B2Circuit for synchronizing signals during the exchange of information between circuitsINFINEON TECHNOLOGIES AG·Filed 2002·Granted Aug 10, 2004·0 cites·6 claims
- 0527US2003002351A1Integrated memory circuit and method for reading a data item from a memory cellFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →