Inventor · disambiguated record
Richard Yen-Hsiang Chang
Also filed as: CHANG RICHARD · CHANG RICHARD Y · CHANG RICHARD YEN-HSIANG
30 granted patents·657 citations·filing 1994–2014
97Inventor score
Top patents by PatentIndex Score
30 records- 0194US5815634AStream synchronization method and apparatus for MPEG playback systemCIRRUS LOGIC INC·Filed 1994·Granted Sep 29, 1998·183 cites·46 claims
- 0294US5594660AProgrammable audio-video synchronization method and apparatus for multimedia systemsCIRRUS LOGIC INC·Filed 1994·Granted Jan 14, 1997·193 cites·74 claims
- 0390US7075365B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2004·Granted Jul 11, 2006·24 cites·20 claims
- 0490US6661253B1Passgate structures for use in low-voltage applicationsALTERA CORP·Filed 2001·Granted Dec 9, 2003·29 cites·20 claims
- 0589US8774305B1Bit slip circuitry for serial data signalsALTERA CORP·Filed 2013·Granted Jul 8, 2014·6 cites·20 claims
- 0688US6515508B1Differential interconnection circuits in programmable logic devicesALTERA CORP·Filed 2001·Granted Feb 4, 2003·31 cites·4 claims
- 0787US7286007B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2005·Granted Oct 23, 2007·9 cites·20 claims
- 0885US8441314B1Configurable clock network for programmable logic deviceSTARR GREGORY·Filed 2012·Granted May 14, 2013·4 cites·12 claims
- 0983US8072260B1Configurable clock network for programmable logic deviceSTARR GREGORY·Filed 2010·Granted Dec 6, 2011·4 cites·20 claims
- 1083US7859329B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2009·Granted Dec 28, 2010·6 cites·7 claims
- 1182US7276943B2Highly configurable PLL architecture for programmable logicALTERA CORP·Filed 2006·Granted Oct 2, 2007·11 cites·20 claims
- 1281US7646237B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2007·Granted Jan 12, 2010·6 cites·9 claims
- 1380US8253484B1Configurable clock network for programmable logic deviceSTARR GREGORY·Filed 2011·Granted Aug 28, 2012·3 cites·12 claims
- 1480US7242229B1Phase locked loop (PLL) and delay locked loop (DLL) counter and delay element programming in user modeALTERA CORP·Filed 2002·Granted Jul 10, 2007·26 cites·104 claims
- 1579US7236007B1Methods and systems for achieving improved intellectual property protection for programmable logic devicesALTERA CORP·Filed 2004·Granted Jun 26, 2007·19 cites·21 claims
- 1672US7440532B1Bit slip circuitry for serial data signalsALTERA CORP·Filed 2004·Granted Oct 21, 2008·10 cites·42 claims
- 1771US5838380AMemory controller for decoding a compressed/encoded video data frameCIRRUS LOGIC INC·Filed 1994·Granted Nov 17, 1998·28 cites·10 claims
- 1868US7800405B2Passgate structures for use in low-voltage applicationsALTERA CORP·Filed 2009·Granted Sep 21, 2010·3 cites·12 claims
- 1965US7623609B2Dynamic phase alignment methods and apparatusALTERA CORP·Filed 2008·Granted Nov 24, 2009·4 cites·14 claims
- 2062US7098707B2Highly configurable PLL architecture for programmable logicALTERA CORP·Filed 2004·Granted Aug 29, 2006·10 cites·19 claims
- 2161US8477897B1Bit slip circuitry for serial data signalsCHANG RICHARD YEN-HSIANG·Filed 2008·Granted Jul 2, 2013·3 cites·20 claims
- 2261US7557608B2Passgate structures for use in low-voltage applicationsALTERA CORP·Filed 2006·Granted Jul 7, 2009·2 cites·8 claims
- 2361US7453968B2Dynamic phase alignment methods and apparatusALTERA CORP·Filed 2004·Granted Nov 18, 2008·9 cites·32 claims
- 2460US5923665AMemory controller for decoding a compressed/encoded video data frameCIRRUS LOGIC INC·Filed 1997·Granted Jul 13, 1999·21 cites·9 claims
- 2558US9054854B1Bit slip circuitry for serial data signalsALTERA CORP·Filed 2014·Granted Jun 9, 2015·0 cites·20 claims
- 2655US9490812B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2014·Granted Nov 8, 2016·0 cites·20 claims
- 2754US8680913B1Configurable clock network for programmable logic deviceALTERA CORP·Filed 2013·Granted Mar 25, 2014·0 cites·7 claims
- 2851US7119574B1Passage structures for use in low-voltage applicationsALTERA CORP·Filed 2003·Granted Oct 10, 2006·3 cites·15 claims
- 2951US6842040B1Differential interconnection circuits in programmable logic devicesALTERA CORP·Filed 2002·Granted Jan 11, 2005·4 cites·24 claims
- 3050US6933761B2Techniques for dynamically selecting phases of oscillator signalsALTERA CORP·Filed 2003·Granted Aug 23, 2005·6 cites·33 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →