Inventor · disambiguated record
Rinat Rappoport
Also filed as: RAPPOPORT RINAT
20 granted patents·9 pending applications·129 citations·filing 2001–2024
95Inventor score
Top patents by PatentIndex Score
29 records- 0198US11977886B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted May 7, 2024·7 cites·20 claims
- 0298US11847452B2Systems, methods, and apparatus for tile configurationINTEL CORP·Filed 2021·Granted Dec 19, 2023·7 cites·20 claims
- 0398US11714642B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2022·Granted Aug 1, 2023·7 cites·19 claims
- 0498US11086623B2Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2017·Granted Aug 10, 2021·32 cites·20 claims
- 0597US11080048B2Systems, methods, and apparatus for tile configurationINTEL CORP·Filed 2017·Granted Aug 3, 2021·14 cites·11 claims
- 0696US11567765B2Systems, methods, and apparatuses for tile loadINTEL CORP·Filed 2017·Granted Jan 31, 2023·8 cites·20 claims
- 0795US11288069B2Systems, methods, and apparatuses for tile storeINTEL CORP·Filed 2017·Granted Mar 29, 2022·7 cites·17 claims
- 0894US11023382B2Systems, methods, and apparatuses utilizing CPU storage with a memory referenceINTEL CORP·Filed 2017·Granted Jun 1, 2021·14 cites·9 claims
- 0992US2025117222A1Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2024·Application pending·0 cites
- 1090US12147804B2Systems, methods, and apparatuses for tile matrix multiplication and accumulationINTEL CORP·Filed 2021·Granted Nov 19, 2024·1 cites·21 claims
- 1190US2025004716A1Systems, methods, and apparatuses for tile loadINTEL CORP·Filed 2024·Application pending·0 cites
- 1289US12282773B2Systems, methods, and apparatus for tile configurationINTEL CORP·Filed 2023·Granted Apr 22, 2025·0 cites·20 claims
- 1389US2024192954A1Systems, methods, and apparatuses for matrix operationsINTEL CORP·Filed 2024·Application pending·0 cites
- 1485US12182571B2Systems, methods, and apparatuses for tile load, multiplication and accumulationINTEL CORP·Filed 2023·Granted Dec 31, 2024·0 cites·20 claims
- 1583US7865712B2Method and apparatus for booting a processing systemINTEL CORP·Filed 2007·Granted Jan 4, 2011·13 cites·25 claims
- 1677US9594807B2Emotion-related query processingRAPPOPORT RINAT·Filed 2013·Granted Mar 14, 2017·11 cites·23 claims
- 1774US9727345B2Method for booting a heterogeneous system and presenting a symmetric core viewINTEL CORP·Filed 2013·Granted Aug 8, 2017·3 cites·17 claims
- 1874US9430384B2Instructions and logic to provide advanced paging capabilities for secure enclave page cachesROZAS CARLOS V·Filed 2013·Granted Aug 30, 2016·3 cites·28 claims
- 1972US12106100B2Systems, methods, and apparatuses for matrix operationsINTEL CORP·Filed 2017·Granted Oct 1, 2024·0 cites·19 claims
- 2071US10592421B2Instructions and logic to provide advanced paging capabilities for secure enclave page cachesINTEL CORP·Filed 2016·Granted Mar 17, 2020·1 cites·11 claims
- 2156US10503517B2Method for booting a heterogeneous system and presenting a symmetric core viewINTEL CORP·Filed 2017·Granted Dec 10, 2019·0 cites·15 claims
- 2251US8249853B2Exposing device features in partitioned environmentJACKSON JEFF·Filed 2006·Granted Aug 21, 2012·1 cites·12 claims
- 2349US11275588B2Context save with variable save state sizeINTEL CORP·Filed 2017·Granted Mar 15, 2022·0 cites·17 claims
- 2446US2011016290A1Method and Apparatus for Supporting Address Translation in a Multiprocessor Virtual Machine EnvironmentCHOBOTARO ARIE·Filed 2009·Application pending·0 cites
- 2546US2023409326A1Device, method and system for executing a tile load and expand instructionINTEL CORP·Filed 2022·Application pending·0 cites
- 2645US2023102279A1Apparatuses, methods, and systems for instructions for structured-sparse tile matrix fmaINTEL CORP·Filed 2021·Application pending·0 cites
- 2738US2003093258A1Method and apparatus for efficient simulation of memory mapped device accessFiled 2001·Application pending·0 cites
- 2835US2003229484A1Method and apparatus for simulating conditional branch instructions in a simulator which implies binary translationFiled 2002·Application pending·0 cites
- 2934US2003115578A1PC platform simulation system employing efficient memory access simulation in a direct execution environmentFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →