Inventor · disambiguated record
Robert M. Bigwood
Also filed as: BIGWOOD ROBERT · BIGWOOD ROBERT M
8 granted patents·3 pending applications·33 citations·filing 2004–2021
84Inventor score
Top patents by PatentIndex Score
11 records- 0193US10409152B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2017·Granted Sep 10, 2019·4 cites·20 claims
- 0290US10319625B2Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structuresINTEL CORP·Filed 2015·Granted Jun 11, 2019·7 cites·20 claims
- 0388US9558947B2Pattern decomposition lithography techniquesWALLACE CHARLES H·Filed 2011·Granted Jan 31, 2017·6 cites·16 claims
- 0487US10490519B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2017·Granted Nov 26, 2019·2 cites·20 claims
- 0585US11107786B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2019·Granted Aug 31, 2021·2 cites·20 claims
- 0676US12278204B2Pattern decomposition lithography techniquesINTEL CORP·Filed 2021·Granted Apr 15, 2025·0 cites·15 claims
- 0768US7470492B2Process window-based correction for photolithography masksINTEL CORP·Filed 2004·Granted Dec 30, 2008·12 cites·20 claims
- 0857US10636700B2Metal via processing schemes with via critical dimension (CD) control for back end of line (BEOL) interconnects and the resulting structuresINTEL CORP·Filed 2019·Granted Apr 28, 2020·0 cites·20 claims
- 0947US2022415780A1Dummy gate patterning lines and integrated circuit structures resulting therefromINTEL CORP·Filed 2021·Application pending·0 cites
- 1045US2017069509A1Data compression for ebeam throughputINTEL CORP·Filed 2014·Application pending·0 cites
- 1141US2021183761A1Line patterning in integrated circuit devicesINTEL CORP·Filed 2019·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →