Inventor · disambiguated record
Robert G. Blankenship
Also filed as: BLANKENSHIP ROBERT · BLANKENSHIP ROBERT G
121 granted patents·21 pending applications·941 citations·filing 2001–2025
99Inventor score
Top patents by PatentIndex Score
142 records- 0198US11816036B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2022·Granted Nov 14, 2023·11 cites·25 claims
- 0296US12197357B2High performance interconnectINTEL CORP·Filed 2021·Granted Jan 14, 2025·2 cites·20 claims
- 0396US10552253B2Multichip package link error detectionINTEL CORP·Filed 2015·Granted Feb 4, 2020·15 cites·20 claims
- 0496US8230120B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted Jul 24, 2012·21 cites·28 claims
- 0596US7949794B2PCI express enhancements and extensionsINTEL CORP·Filed 2006·Granted May 24, 2011·41 cites·22 claims
- 0696US6681292B2Distributed read and write caching implementation for optimized input/output applicationsINTEL CORP·Filed 2001·Granted Jan 20, 2004·294 cites·30 claims
- 0795US10552357B2Multichip package linkINTEL CORP·Filed 2017·Granted Feb 4, 2020·14 cites·25 claims
- 0894US11061850B2Multiple transaction data flow control unit for high-speed interconnectINTEL CORP·Filed 2019·Granted Jul 13, 2021·8 cites·26 claims
- 0994US9626321B2High performance interconnectINTEL CORP·Filed 2013·Granted Apr 18, 2017·14 cites·1 claims
- 1094US8230119B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2010·Granted Jul 24, 2012·14 cites·3 claims
- 1194US8099523B2PCI express enhancements and extensions including transactions having prefetch parametersAJANOVIC JASMIN·Filed 2011·Granted Jan 17, 2012·16 cites·4 claims
- 1293US10380046B2High performance interconnect physical layerINTEL CORP·Filed 2018·Granted Aug 13, 2019·4 cites·20 claims
- 1393US10248591B2High performance interconnectINTEL CORP·Filed 2016·Granted Apr 2, 2019·5 cites·23 claims
- 1493US9418035B2High performance interconnect physical layerINTEL CORP·Filed 2013·Granted Aug 16, 2016·9 cites·23 claims
- 1593US7899943B2PCI express enhancements and extensionsINTEL CORP·Filed 2007·Granted Mar 1, 2011·16 cites·23 claims
- 1692US11741030B2High performance interconnectINTEL CORP·Filed 2020·Granted Aug 29, 2023·2 cites·20 claims
- 1792US11061761B2Multichip package link error detectionINTEL CORP·Filed 2020·Granted Jul 13, 2021·3 cites·26 claims
- 1892US10360096B2Error handling in transactional buffered memoryINTEL CORP·Filed 2017·Granted Jul 23, 2019·12 cites·23 claims
- 1992US10204064B2Multislot link layer flit wherein flit includes three or more slots whereby each slot comprises respective control field and respective payload fieldINTEL CORP·Filed 2017·Granted Feb 12, 2019·5 cites·26 claims
- 2092US9916266B2High performance interconnect physical layerINTEL CORP·Filed 2016·Granted Mar 13, 2018·4 cites·24 claims
- 2192US8073981B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2007·Granted Dec 6, 2011·14 cites·12 claims
- 2291US8549183B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2010·Granted Oct 1, 2013·8 cites·22 claims
- 2391US8447888B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted May 21, 2013·8 cites·15 claims
- 2491US7930566B2PCI express enhancements and extensionsINTEL CORP·Filed 2007·Granted Apr 19, 2011·13 cites·17 claims
- 2590US10073808B2Multichip package linkINTEL CORP·Filed 2013·Granted Sep 11, 2018·11 cites·20 claims
- 2690US8555101B2PCI express enhancements and extensionsAJANOVIC JASMIN·Filed 2011·Granted Oct 8, 2013·7 cites·10 claims
- 2790US2025321910A1High performance interconnectINTEL CORP·Filed 2025·Application pending·0 cites
- 2889US11797378B2Multichip package link error detectionINTEL CORP·Filed 2022·Granted Oct 24, 2023·1 cites·20 claims
- 2989US11307928B2Multichip package link error detectionINTEL CORP·Filed 2020·Granted Apr 19, 2022·2 cites·20 claims
- 3089US10606755B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2017·Granted Mar 31, 2020·5 cites·21 claims
- 3189US9619396B2Two level memory full line writesINTEL CORP·Filed 2015·Granted Apr 11, 2017·6 cites·24 claims
- 3289US9229897B2Embedded control channel for high speed serial interconnectIYER VENKATRAMAN·Filed 2012·Granted Jan 5, 2016·13 cites·31 claims
- 3389US8473642B2PCI express enhancements and extensions including device window cachingAJANOVIC JASMIN·Filed 2011·Granted Jun 25, 2013·6 cites·12 claims
- 3488US9032103B2Transaction re-orderingINTEL CORP·Filed 2012·Granted May 12, 2015·5 cites·27 claims
- 3588US9026682B2Prefectching in PCI expressINTEL CORP·Filed 2012·Granted May 5, 2015·5 cites·35 claims
- 3688US8793404B2Atomic operationsAJANOVIC JASMIN·Filed 2012·Granted Jul 29, 2014·5 cites·6 claims
- 3788US7210000B2Transmitting peer-to-peer transactions through a coherent interfaceINTEL CORP·Filed 2004·Granted Apr 24, 2007·51 cites·29 claims
- 3887US11327894B2Method and system for performing data movement operations with read snapshot and in place write updateINTEL CORP·Filed 2020·Granted May 10, 2022·2 cites·9 claims
- 3987US9658963B2Speculative reads in buffered memoryINTEL CORP·Filed 2014·Granted May 23, 2017·8 cites·20 claims
- 4087US9639490B2Ring protocol for low latency interconnect switchBLANKENSHIP ROBERT G·Filed 2011·Granted May 2, 2017·13 cites·19 claims
- 4187US9575895B2Providing common caching agent for core and integrated input/output (IO) moduleINTEL CORP·Filed 2015·Granted Feb 21, 2017·5 cites·17 claims
- 4287US9183171B2Fast deskew when exiting low-power partial-width high speed link stateINTEL CORP·Filed 2012·Granted Nov 10, 2015·9 cites·34 claims
- 4387US9098415B2PCI express transaction descriptorINTEL CORP·Filed 2012·Granted Aug 4, 2015·4 cites·39 claims
- 4486US11698879B2Flexible on-die fabric interfaceINTEL CORP·Filed 2020·Granted Jul 11, 2023·2 cites·25 claims
- 4586US10387339B2High performance interconnect physical layerINTEL CORP·Filed 2016·Granted Aug 20, 2019·3 cites·24 claims
- 4686US10360098B2High performance interconnect link layerINTEL CORP·Filed 2016·Granted Jul 23, 2019·4 cites·17 claims
- 4786US10248325B2Implied directory state updatesINTEL CORP·Filed 2016·Granted Apr 2, 2019·3 cites·19 claims
- 4886US9442879B2Multiple transaction data flow control unit for high-speed interconnectSAFRANEK ROBERT J·Filed 2011·Granted Sep 13, 2016·7 cites·20 claims
- 4986US9355058B2High performance interconnect physical layerINTEL CORP·Filed 2013·Granted May 31, 2016·13 cites·27 claims
- 5085US12189550B2High performance interconnectINTEL CORP·Filed 2023·Granted Jan 7, 2025·0 cites·20 claims
Showing the top 50 of 142 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →