Inventor · disambiguated record
Robert C. Bowen
Also filed as: BOWEN ROBERT C · BOWEN ROBERT CHRISTOPHER
29 granted patents·1 pending application·475 citations·filing 2003–2016
96Inventor score
Files withSAMSUNG ELECTRONICS CO LTD13TEXAS INSTRUMENTS INC7OBRADOVIC BORNA J5KITTL JORGE A2EDWARDS HENRY L1
Top patents by PatentIndex Score
30 records- 0198US9711414B2Strained stacked nanosheet FETS and/or quantum well stacked nanosheetSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Jul 18, 2017·32 cites·30 claims
- 0298US9647098B2Thermionically-overdriven tunnel FETs and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted May 9, 2017·42 cites·24 claims
- 0398US9461114B2Semiconductor devices with structures for suppression of parasitic bipolar effect in stacked nanosheet FETs and methods of fabricating the sameOBRADOVIC BORNA J·Filed 2015·Granted Oct 4, 2016·43 cites·20 claims
- 0498US7061058B2Forming a retrograde well in a transistor to enhance performance of the transistorTEXAS INSTRUMENTS INC·Filed 2005·Granted Jun 13, 2006·125 cites·12 claims
- 0597US9570609B2Crystalline multiple-nanosheet strained channel FETs and methods of fabricating the sameOBRADOVIC BORNA J·Filed 2015·Granted Feb 14, 2017·56 cites·20 claims
- 0697US9287357B2Integrated circuits with Si and non-Si nanosheet FET co-integration with low band-to-band tunneling and methods of fabricating the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Mar 15, 2016·66 cites·20 claims
- 0795US9064699B2Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methodsWANG WEI-E·Filed 2014·Granted Jun 23, 2015·30 cites·20 claims
- 0892US9831323B2Structure and method to achieve compressively strained Si NSSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Nov 28, 2017·8 cites·20 claims
- 0992US9793403B2Multi-layer fin field effect transistor devices and methods of forming the sameOBRADOVIC BORNA J·Filed 2016·Granted Oct 17, 2017·9 cites·20 claims
- 1089US9178045B2Integrated circuit devices including FinFETS and methods of forming the sameOBRADOVIC BORNA J·Filed 2014·Granted Nov 3, 2015·9 cites·22 claims
- 1185US10170549B2Strained stacked nanosheet FETs and/or quantum well stacked nanosheetSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Jan 1, 2019·4 cites·33 claims
- 1283US9000505B2Quantum electro-optical device using CMOS transistor with reverse polarity drain implantEDWARDS HENRY L·Filed 2011·Granted Apr 7, 2015·9 cites·1 claims
- 1382US9613907B2Low resistivity damascene interconnectSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Apr 4, 2017·4 cites·20 claims
- 1480US9431529B2Confined semi-metal field effect transistorSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Aug 30, 2016·3 cites·24 claims
- 1572US7910918B2Gated resonant tunneling diodeTEXAS INSTRUMENTS INC·Filed 2009·Granted Mar 22, 2011·4 cites·24 claims
- 1668US8362462B2Gated resonant tunneling diodeTEXAS INSTRUMENTS INC·Filed 2011·Granted Jan 29, 2013·2 cites·18 claims
- 1767US6927137B2Forming a retrograde well in a transistor to enhance performance of the transistorTEXAS INSTRUMENTS INC·Filed 2003·Granted Aug 9, 2005·9 cites·12 claims
- 1866US9236444B2Methods of fabricating quantum well field effect transistors having multiple delta doped layersSAMSUNG ELECTRONICS CO LTD·Filed 2013·Granted Jan 12, 2016·2 cites·20 claims
- 1966US7268399B2Enhanced PMOS via transverse stressTEXAS INSTRUMENTS INC·Filed 2004·Granted Sep 11, 2007·10 cites·10 claims
- 2062US10283638B2Structure and method to achieve large strain in NS without addition of stack-generated defectsKITTL JORGE A·Filed 2016·Granted May 7, 2019·1 cites·6 claims
- 2162US10147793B2FinFET devices including recessed source/drain regions having optimized depthsOBRADOVIC BORNA J·Filed 2014·Granted Dec 4, 2018·1 cites·14 claims
- 2262US9917158B2Device contact structures including heterojunctions for low contact resistanceKITTL JORGE A·Filed 2015·Granted Mar 13, 2018·1 cites·16 claims
- 2362US9685509B2Finfet devices including high mobility channel materials with materials of graded composition in recessed source/drain regionsSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Jun 20, 2017·1 cites·16 claims
- 2462US7943450B2Gated resonant tunneling diodeTEXAS INSTRUMENTS INC·Filed 2009·Granted May 17, 2011·2 cites·23 claims
- 2561US9716176B2FinFET semiconductor devices including recessed source-drain regions on a bottom semiconductor layer and methods of fabricating the sameRODDER MARK S·Filed 2014·Granted Jul 25, 2017·2 cites·16 claims
- 2651US9112130B2Quantum interference based logic devices including electron monochromatorSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Aug 18, 2015·0 cites·24 claims
- 2750US9525053B2Integrated circuit devices including strained channel regions and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2014·Granted Dec 20, 2016·0 cites·20 claims
- 2850US7534676B2Method of forming enhanced device via transverse stressTEXAS INSTRUMENTS INC·Filed 2007·Granted May 19, 2009·0 cites·10 claims
- 2942US9583590B2Integrated circuit devices including FinFETs and methods of forming the sameSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Feb 28, 2017·0 cites·22 claims
- 3034US2016071729A1Rectangular nanosheet fabricationSAMSUNG ELECTRONICS CO LTD·Filed 2015·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Robert C. Bowen files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →