Inventor · disambiguated record
Roger K. Cheng
Also filed as: CHENG ROGER · CHENG ROGER K
10 granted patents·1 pending application·72 citations·filing 2004–2021
87Inventor score
Top patents by PatentIndex Score
11 records- 0189US7602859B2Calibrating integrating receivers for source synchronous protocolINTEL CORP·Filed 2005·Granted Oct 13, 2009·22 cites·27 claims
- 0288US11722128B2Duty cycle correction system and low dropout (LDO) regulator based delay-locked loop (DLL)INTEL CORP·Filed 2021·Granted Aug 8, 2023·2 cites·20 claims
- 0388US7020818B2Method and apparatus for PVT controller for programmable on die terminationINTEL CORP·Filed 2004·Granted Mar 28, 2006·30 cites·9 claims
- 0483US11070200B2Duty cycle correction system and low dropout (LDO) regulator based delay-locked loop (DLL)INTEL CORP·Filed 2018·Granted Jul 20, 2021·4 cites·25 claims
- 0576US7692457B2Dual-path clocking architectureINTEL CORP·Filed 2008·Granted Apr 6, 2010·8 cites·20 claims
- 0666US7403034B2PVT controller for programmable on die terminationINTEL CORP·Filed 2006·Granted Jul 22, 2008·4 cites·11 claims
- 0763US10007749B2Converged adaptive compensation schemeINTEL CORP·Filed 2014·Granted Jun 26, 2018·1 cites·27 claims
- 0854US10672438B2Dynamic reconfigurable dual power I/O receiverINTEL CORP·Filed 2018·Granted Jun 2, 2020·1 cites·20 claims
- 0947US10923164B2Dual power I/O transmitterINTEL CORP·Filed 2018·Granted Feb 16, 2021·0 cites·18 claims
- 1046US11023244B2System, apparatus and method for recovering link state during link trainingINTEL CORP·Filed 2017·Granted Jun 1, 2021·0 cites·19 claims
- 1139US2006245473A1Integrating receivers for source synchronous protocolCHENG ROGER K·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →