Inventor · disambiguated record
Roger J. Gravrok
Also filed as: GRAVROK ROGER J · GRAVROK ROGER JOHN
13 granted patents·3 pending applications·92 citations·filing 1987–2013
91Inventor score
Top patents by PatentIndex Score
16 records- 0187US4853561AFamily of noise-immune logic gates and memory cellsUNIV MINNESOTA·Filed 1987·Granted Aug 1, 1989·42 cites·49 claims
- 0278US7954000B2Power supply current spike reduction techniques for an integrated circuitIBM·Filed 2008·Granted May 31, 2011·9 cites·14 claims
- 0376US7885781B2Acquiring test data from an electronic circuitIBM·Filed 2008·Granted Feb 8, 2011·6 cites·8 claims
- 0467US7383146B2Acquiring test data from an electronic circuitIBM·Filed 2006·Granted Jun 3, 2008·3 cites·2 claims
- 0566US7348805B2Chip-to-chip digital transmission circuit delivering power over signal linesIBM·Filed 2006·Granted Mar 25, 2008·4 cites·14 claims
- 0665US7398174B2Acquiring test data from an electronic circuitIBM·Filed 2007·Granted Jul 8, 2008·3 cites·4 claims
- 0760US7197818B2Method and structures for implementing customizable dielectric printed circuit card tracesIBM·Filed 2006·Granted Apr 3, 2007·2 cites·7 claims
- 0855US7131084B2Method, apparatus and computer program product for implementing automated detection excess aggressor shape capacitance coupling in printed circuit board layoutsIBM·Filed 2003·Granted Oct 31, 2006·6 cites·14 claims
- 0955US7129417B2Method and structures for implementing customizable dielectric printed circuit card tracesIBM·Filed 2004·Granted Oct 31, 2006·5 cites·5 claims
- 1055US7010768B2Transmission line bounding modelsIBM·Filed 2003·Granted Mar 7, 2006·4 cites·16 claims
- 1154US7089171B2Method for characterizing the accuracy of a simulated electrical circuit modelIBM·Filed 2002·Granted Aug 8, 2006·4 cites·16 claims
- 1249US2008234966A1Acquiring Test Data From An Electronic CircuitIBM·Filed 2008·Application pending·0 cites
- 1345US8922224B2Snoop detection on calibrated busBILLAU RONALD L·Filed 2012·Granted Dec 30, 2014·0 cites·23 claims
- 1442US2009327562A1Implementing Bus Interface Calibration for Enhanced Bus Interface Initialization TimeIBM·Filed 2008·Application pending·0 cites
- 1536US2015002204A1Variable impedance driver for resonant clock networksIBM·Filed 2013·Application pending·0 cites
- 1635US5111074AMulti-input compound function complementary noise-immune logicUNIV MINNESOTA·Filed 1990·Granted May 5, 1992·4 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →