Inventor · disambiguated record
Robert F. Krick
Also filed as: KRICK ROBERT · KRICK ROBERT F · KRICK ROBERT FRANKLIN
34 granted patents·7 pending applications·1,022 citations·filing 1988–2013
98Inventor score
Files withINTEL CORP25HEWLETT PACKARD DEVELOPMENT CO4KRICK ROBERT4ADVANCED MICRO DEVICES INC2THOMPSON STEPHEN P1
Top patents by PatentIndex Score
41 records- 0187US7856633B1LRU cache replacement for a partitioned set associative cacheINTEL CORP·Filed 2000·Granted Dec 21, 2010·49 cites·35 claims
- 0285US9058269B2Method and apparatus including a probe filter for shared caches utilizing inclusion bits and a victim probe bitKRICK ROBERT·Filed 2012·Granted Jun 16, 2015·10 cites·29 claims
- 0384US6018786ATrace based instruction cachingINTEL CORP·Filed 1997·Granted Jan 25, 2000·107 cites·46 claims
- 0483US6442674B1Method and system for bypassing a fill buffer located along a first instruction pathINTEL CORP·Filed 1998·Granted Aug 27, 2002·115 cites·12 claims
- 0581US5781774AProcessor having operating modes for an upgradeable multiprocessor computer systemINTEL CORP·Filed 1996·Granted Jul 14, 1998·94 cites·13 claims
- 0680US6014742ATrace branch prediction unitINTEL CORP·Filed 1997·Granted Jan 11, 2000·87 cites·26 claims
- 0778US5050068AMethod and apparatus for using extracted program flow information to prepare for execution multiple instruction streamsUNIV DUKE·Filed 1988·Granted Sep 17, 1991·71 cites·33 claims
- 0876US6493797B1Multi-tag system and method for cache read/writeINTEL CORP·Filed 2000·Granted Dec 10, 2002·30 cites·17 claims
- 0973US6170038B1Trace based instruction cachingINTEL CORP·Filed 1999·Granted Jan 2, 2001·60 cites·18 claims
- 1070US9146869B2State encoding for cache linesADVANCED MICRO DEVICES INC·Filed 2012·Granted Sep 29, 2015·2 cites·18 claims
- 1168US5630107ASystem for loading PLL from bus fraction register when bus fraction register is in either first or second state and bus unit not busyINTEL CORP·Filed 1994·Granted May 13, 1997·54 cites·21 claims
- 1265US7114057B2System and method for storing immediate dataINTEL CORP·Filed 2001·Granted Sep 26, 2006·7 cites·23 claims
- 1364US5726921AFloating point power conservationINTEL CORP·Filed 1995·Granted Mar 10, 1998·38 cites·4 claims
- 1463US6711669B2System and method for storing immediate dataINTEL CORP·Filed 2003·Granted Mar 23, 2004·6 cites·8 claims
- 1563US6338132B1System and method for storing immediate dataINTEL CORP·Filed 1998·Granted Jan 8, 2002·28 cites·8 claims
- 1663US6009504AApparatus and method for storing data associated with multiple addresses in a storage element using a base address and a maskINTEL CORP·Filed 1996·Granted Dec 28, 1999·22 cites·20 claims
- 1762US7730281B2System and method for storing immediate dataINTEL CORP·Filed 2007·Granted Jun 1, 2010·1 cites·20 claims
- 1862US6578138B1System and method for unrolling loops in a trace cacheINTEL CORP·Filed 1999·Granted Jun 10, 2003·38 cites·22 claims
- 1962US6457119B1Processor instruction pipeline with error detection schemeINTEL CORP·Filed 1999·Granted Sep 24, 2002·41 cites·28 claims
- 2061US6918021B2System of and method for flow control within a tag pipelineHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Jul 12, 2005·8 cites·23 claims
- 2161US5490279AMethod and apparatus for operating a single CPU computer system as a multiprocessor systemINTEL CORP·Filed 1993·Granted Feb 6, 1996·41 cites·33 claims
- 2259US7334115B1Detection, recovery and prevention of bogus branchesINTEL CORP·Filed 2000·Granted Feb 19, 2008·8 cites·25 claims
- 2357US7149883B1Method and apparatus selectively to advance a write pointer for a queue based on the indicated validity or invalidity of an instruction stored within the queueINTEL CORP·Filed 2000·Granted Dec 12, 2006·5 cites·17 claims
- 2456US6915396B2Fast priority determination circuit with rotating priorityHEWLETT PACKARD DEVELOPMENT CO·Filed 2001·Granted Jul 5, 2005·8 cites·18 claims
- 2556US5638382ABuilt-in self test function for a processor including intermediate test resultsINTEL CORP·Filed 1994·Granted Jun 10, 1997·31 cites·12 claims
- 2648US5884091AComputer system having a central processing unit responsive to the identity of an upgrade processorINTEL CORP·Filed 1994·Granted Mar 16, 1999·21 cites·5 claims
- 2747US7321963B2System and method for storing immediate dataINTEL CORP·Filed 2004·Granted Jan 22, 2008·0 cites·15 claims
- 2846US2015095586A1Storing non-temporal cache dataADVANCED MICRO DEVICES INC·Filed 2013·Application pending·0 cites
- 2945US6493821B1Recovery from writeback stage event signal or micro-branch misprediction using instruction sequence number indexed state information tableINTEL CORP·Filed 1998·Granted Dec 10, 2002·17 cites·33 claims
- 3045US6035315AFloating point power conservationINTEL CORP·Filed 1997·Granted Mar 7, 2000·15 cites·4 claims
- 3144US8751745B2Method for concurrent flush of L1 and L2 cachesKRICK ROBERT·Filed 2010·Granted Jun 10, 2014·0 cites·12 claims
- 3244US2004098565A1Instruction queue for an instruction pipelineFiled 2003·Application pending·0 cites
- 3343US2013311724A1Cache system with biased cache line replacement policy and method thereforWALKER WILLIAM L·Filed 2012·Application pending·0 cites
- 3442US7032077B2Multiple cache coherencyHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Apr 18, 2006·0 cites·17 claims
- 3542US2012096226A1Two level replacement scheme optimizes for performance, power, and areaTHOMPSON STEPHEN P·Filed 2010·Application pending·0 cites
- 3640US2002169935A1System of and method for memory arbitration using multiple queuesFiled 2001·Application pending·0 cites
- 3739US6950906B2System for and method of operating a cacheHEWLETT PACKARD DEVELOPMENT CO·Filed 2002·Granted Sep 27, 2005·0 cites·25 claims
- 3839US2012096295A1Method and apparatus for dynamic power control of cache memoryKRICK ROBERT·Filed 2010·Application pending·0 cites
- 3936US5931930AProcessor that indicates system bus ownership in an upgradable multiprocessor computer systemINTEL CORP·Filed 1996·Granted Aug 3, 1999·8 cites·34 claims
- 4034US8924817B2Method and apparatus for calculating error correction codes for selective data updatesKRICK ROBERT·Filed 2010·Granted Dec 30, 2014·0 cites·13 claims
- 4128US2001032307A1Micro-instruction queue for a microprocessor instruction pipelineFiled 1998·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Robert F. Krick files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →