Inventor · disambiguated record
Robert V. Ledoux
Also filed as: LEDOUX ROBERT V
9 granted patents·280 citations·filing 1983–1990
89Inventor score
Technology areasG06F
Top patents by PatentIndex Score
9 records- 0183US5193181ARecovery method and apparatus for a pipelined processing unit of a multiprocessor systemBULL HN INFORMATION SYST·Filed 1990·Granted Mar 9, 1993·102 cites·18 claims
- 0276US4667288AEnable/disable control checking apparatusHONEYWELL INF SYSTEMS·Filed 1983·Granted May 19, 1987·47 cites·28 claims
- 0375US4686621ATest apparatus for testing a multilevel cache system with graceful degradation capabilityHONEYWELL INF SYSTEMS·Filed 1983·Granted Aug 11, 1987·44 cites·29 claims
- 0466US4562536ADirectory test error mode control apparatusHONEYWELL INF SYSTEMS·Filed 1983·Granted Dec 31, 1985·31 cites·32 claims
- 0562US4980819AMechanism for automatically updating multiple unit register file memories in successive cycles for a pipelined processing systemBULL HN INFORMATION SYST·Filed 1988·Granted Dec 25, 1990·30 cites·19 claims
- 0651US5179671AApparatus for generating first and second selection signals for aligning words of an operand and bytes within these words respectivelyBULL HN INFORMATION SYST·Filed 1989·Granted Jan 12, 1993·19 cites·19 claims
- 0730US5197133AControl store addressing from multiple sourcesBULL HN INFORMATION SYST·Filed 1988·Granted Mar 23, 1993·4 cites·8 claims
- 0830US4916601AMeans for transferring firmware signals between a control store and a microprocessor means through a reduced number of connections by transfer according to firmware signal functionBULL HN INFORMATION SYST·Filed 1988·Granted Apr 10, 1990·1 cites·4 claims
- 0929US5117491ARing reduction logic using parallel determination of ring numbers in a plurality of functional units and forced ring numbers by instruction decodingBULL HN INFORMATION SYST·Filed 1989·Granted May 26, 1992·2 cites·8 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →