Inventor · disambiguated record
Robert Alan May
Also filed as: MAY ROBERT · MAY ROBERT A · MAY ROBERT ALAN
84 granted patents·52 pending applications·202 citations·filing 2014–2025
98Inventor score
Top patents by PatentIndex Score
136 records- 0199US10163798B1Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling sameINTEL CORP·Filed 2017·Granted Dec 25, 2018·105 cites·25 claims
- 0297US11302643B2Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2020·Granted Apr 12, 2022·5 cites·19 claims
- 0396US12176292B2Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2023·Granted Dec 24, 2024·2 cites·20 claims
- 0496US11393766B2Multi-chip package with high density interconnectsINTEL CORP·Filed 2020·Granted Jul 19, 2022·3 cites·18 claims
- 0596US11043457B2Embedded multi-die interconnect bridge packages with lithotgraphically formed bumps and methods of assembling sameINTEL CORP·Filed 2020·Granted Jun 22, 2021·3 cites·9 claims
- 0696US10727185B2Multi-chip package with high density interconnectsINTEL CORP·Filed 2016·Granted Jul 28, 2020·11 cites·20 claims
- 0795US11817390B2Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2022·Granted Nov 14, 2023·2 cites·20 claims
- 0894US12014989B2Device and method of very high density routing used with embedded multi-die interconnect bridgeINTEL CORP·Filed 2022·Granted Jun 18, 2024·1 cites·20 claims
- 0994US10707168B2Embedded multi-die interconnect bridge packages with lithographically formed bumps and methods of assembling sameINTEL CORP·Filed 2018·Granted Jul 7, 2020·7 cites·14 claims
- 1094US10431537B1Electromigration resistant and profile consistent contact arraysINTEL CORP·Filed 2018·Granted Oct 1, 2019·11 cites·26 claims
- 1193US11069620B2Die interconnect substrate, an electrical device and a method for forming a die interconnect substrateINTEL CORP·Filed 2017·Granted Jul 20, 2021·6 cites·25 claims
- 1290US11309239B2Electromigration resistant and profile consistent contact arraysINTEL CORP·Filed 2020·Granted Apr 19, 2022·2 cites·20 claims
- 1389US11935857B2Surface finishes with low RBTV for fine and mixed bump pitch architecturesINTEL CORP·Filed 2022·Granted Mar 19, 2024·1 cites·22 claims
- 1489US2025323167A1Device and method of very high density routing used with embedded multi-die interconnect bridgeINTEL CORP·Filed 2025·Application pending·0 cites
- 1588US11901248B2Embedded die architecture and method of makingINTEL CORP·Filed 2020·Granted Feb 13, 2024·2 cites·20 claims
- 1688US11233009B2Embedded multi-die interconnect bridge having a molded region with through-mold viasINTEL CORP·Filed 2020·Granted Jan 25, 2022·2 cites·15 claims
- 1788US2025125275A1Multi-chip package with high density interconnectsINTEL CORP·Filed 2024·Application pending·0 cites
- 1887US11101222B2Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layersINTEL CORP·Filed 2016·Granted Aug 24, 2021·4 cites·25 claims
- 1987US2025070030A1Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2024·Application pending·0 cites
- 2086US10790233B2Package substrates with integral devicesINTEL CORP·Filed 2016·Granted Sep 29, 2020·5 cites·23 claims
- 2186US2025323166A1Lithographic cavity formation to enable emib bump pitch scalingINTEL CORP·Filed 2025·Application pending·0 cites
- 2286US2024332203A1Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2024·Application pending·0 cites
- 2385US12300613B2Die interconnect substrate, an electrical device and a method for forming a die interconnect substrateINTEL CORP·Filed 2023·Granted May 13, 2025·0 cites·20 claims
- 2485US10872872B2Package substrate with high-density interconnect layer having pillar and via connections for fan out scalingINTEL CORP·Filed 2016·Granted Dec 22, 2020·4 cites·17 claims
- 2585US2025125277A1Panel level packaging for multi-die products interconnected with very high density (vhd) interconnect layersINTEL CORP·Filed 2024·Application pending·0 cites
- 2684US11430740B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2017·Granted Aug 30, 2022·2 cites·13 claims
- 2784US11088103B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2018·Granted Aug 10, 2021·3 cites·20 claims
- 2884US9953959B1Metal protected fan-out cavityINTEL CORP·Filed 2017·Granted Apr 24, 2018·4 cites·8 claims
- 2984US2025253245A1Die interconnect substrate, an electrical device and a method for forming a die interconnect substrateINTEL CORP·Filed 2025·Application pending·0 cites
- 3084US2025069902A1Integrated circuit package supportsINTEL CORP·Filed 2024·Application pending·0 cites
- 3184US2024258240A1Device and method of very high density routing used with embedded multi-die interconnect bridgeINTEL CORP·Filed 2024·Application pending·0 cites
- 3283US12354963B2Lithographic cavity formation to enable EMIB bump pitch scalingINTEL CORP·Filed 2024·Granted Jul 8, 2025·0 cites·19 claims
- 3383US12334443B2Lithographic cavity formation to enable EMIB bump pitch scalingINTEL CORP·Filed 2024·Granted Jun 17, 2025·0 cites·18 claims
- 3483US12176223B2Integrated circuit package supportsINTEL CORP·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 3583US11107781B2RFIC having coaxial interconnect and molded layerINTEL CORP·Filed 2017·Granted Aug 31, 2021·3 cites·20 claims
- 3683US2025226323A1Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2025·Application pending·0 cites
- 3782US11532584B2Package substrate with high-density interconnect layer having pillar and via connections for fan out scalingINTEL CORP·Filed 2020·Granted Dec 20, 2022·1 cites·18 claims
- 3881US12218071B2Panel level packaging for multi-die products interconnected with very high density (VHD) interconnect layersINTEL CORP·Filed 2023·Granted Feb 4, 2025·0 cites·28 claims
- 3981US11901296B2Die interconnect substrate, an electrical device and a method for forming a die interconnect substrateINTEL CORP·Filed 2022·Granted Feb 13, 2024·0 cites·20 claims
- 4081US11488918B2Surface finishes with low rBTV for fine and mixed bump pitch architecturesINTEL CORP·Filed 2018·Granted Nov 1, 2022·3 cites·15 claims
- 4180US12218069B2Multi-chip package with high density interconnectsINTEL CORP·Filed 2022·Granted Feb 4, 2025·0 cites·20 claims
- 4280US11894311B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2022·Granted Feb 6, 2024·0 cites·19 claims
- 4378US12046560B2Microelectronic device with embedded die substrate on interposerINTEL CORP·Filed 2021·Granted Jul 23, 2024·0 cites·19 claims
- 4478US12040276B2Device and method of very high density routing used with embedded multi-die interconnect bridgeINTEL CORP·Filed 2022·Granted Jul 16, 2024·0 cites·20 claims
- 4578US11908802B2Multi-chip package with high density interconnectsINTEL CORP·Filed 2022·Granted Feb 20, 2024·0 cites·19 claims
- 4677US11640942B2Microelectronic component having molded regions with through-mold viasINTEL CORP·Filed 2022·Granted May 2, 2023·0 cites·20 claims
- 4777US11251113B2Methods of embedding magnetic structures in substratesINTEL CORP·Filed 2017·Granted Feb 15, 2022·2 cites·16 claims
- 4876US12354992B2First layer interconnect first on carrier approach for EMIB patchINTEL CORP·Filed 2022·Granted Jul 8, 2025·0 cites·16 claims
- 4976US11854834B2Integrated circuit package supportsINTEL CORP·Filed 2022·Granted Dec 26, 2023·0 cites·17 claims
- 5076US11784128B2Die interconnect substrate, an electrical device and a method for forming a die interconnect substrateINTEL CORP·Filed 2021·Granted Oct 10, 2023·0 cites·20 claims
Showing the top 50 of 136 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →