Inventor · disambiguated record
Roger May
Also filed as: MAY ROGER · MAY ROGER A
23 granted patents·3 pending applications·529 citations·filing 1986–2024
96Inventor score
Top patents by PatentIndex Score
26 records- 0193US7340596B1Embedded processor with watchdog timer for programmable logicALTERA CORP·Filed 2001·Granted Mar 4, 2008·101 cites·22 claims
- 0291US7350178B1Embedded processor with watchdog timer for programmable logicALTERA CORP·Filed 2004·Granted Mar 25, 2008·61 cites·21 claims
- 0389US6745369B1Bus architecture for system on a chipALTERA CORP·Filed 2000·Granted Jun 1, 2004·61 cites·24 claims
- 0486US6803785B1I/O circuitry shared between processor and programmable logic portions of an integrated circuitALTERA CORP·Filed 2001·Granted Oct 12, 2004·41 cites·38 claims
- 0585US7546424B1Embedded processor with dual-port SRAM for programmable logicALTERA CORP·Filed 2006·Granted Jun 9, 2009·14 cites·24 claims
- 0684US7026840B1Programmable logic deviceALTERA CORP·Filed 2004·Granted Apr 11, 2006·27 cites·25 claims
- 0784US6732263B1Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit streamALTERA CORP·Filed 2000·Granted May 4, 2004·39 cites·11 claims
- 0884US4679086AMotion sensitive frame integrationUS AIR FORCE·Filed 1986·Granted Jul 7, 1987·47 cites·6 claims
- 0983US7096324B1Embedded processor with dual-port SRAM for programmable logicALTERA CORP·Filed 2001·Granted Aug 22, 2006·34 cites·20 claims
- 1080US4928258ARecursive median filteringUS AIR FORCE·Filed 1989·Granted May 22, 1990·26 cites·9 claims
- 1174US4814884AWindow generatorUS AIR FORCE·Filed 1987·Granted Mar 21, 1989·33 cites·5 claims
- 1273US11841776B2Single chip multi-die architecture having safety-compliant cross-monitoring capabilityINTEL CORP·Filed 2019·Granted Dec 12, 2023·2 cites·21 claims
- 1372US10018675B1Testing an integrated circuit in user mode using partial reconfigurationALTERA CORP·Filed 2014·Granted Jul 10, 2018·3 cites·20 claims
- 1469US11360846B2Two die system on chip (SoC) for providing hardware fault tolerance (HFT) for a paired SoCINTEL CORP·Filed 2019·Granted Jun 14, 2022·2 cites·25 claims
- 1566US6980024B1I/O circuitry shared between processor and programmable logic portions of an integrated circuitALTERA CORP·Filed 2004·Granted Dec 27, 2005·9 cites·20 claims
- 1665US2024278458A1Dry wall manufacturing method and apparatusMAY ROGER A·Filed 2024·Application pending·0 cites
- 1764US7446561B2I/O circuitry shared between processor and programmable logic portions of an integrated circuitALTERA CORP·Filed 2005·Granted Nov 4, 2008·2 cites·14 claims
- 1862US7343483B1Configuring both a programmable logic device and its embedded logic with a single serialized configuration bit streamALTERA CORP·Filed 2004·Granted Mar 11, 2008·8 cites·20 claims
- 1959US6937061B1Address decoder for programmable logic deviceALTERA CORP·Filed 2003·Granted Aug 30, 2005·7 cites·18 claims
- 2057US7917706B1SDRAM controllerALTERA CORP·Filed 2003·Granted Mar 29, 2011·6 cites·16 claims
- 2153US2019127986A1Dry wall and method of making sameMAY ROGER A·Filed 2018·Application pending·0 cites
- 2252US8190828B1Embedded processor with dual-port SRAM for programmable logicMAY ROGER·Filed 2009·Granted May 29, 2012·1 cites·20 claims
- 2350US7081773B1Updating configuration for programmable logic deviceALTERA CORP·Filed 2004·Granted Jul 25, 2006·5 cites·11 claims
- 2446US9082199B1Video processing architectureCROSLAND ANDREW·Filed 2006·Granted Jul 14, 2015·0 cites·16 claims
- 2545US2004236893A1Bus architecture for system on a chipALTERA CORP·Filed 2004·Application pending·0 cites
- 2630US7064578B1Distributed bus structureALTERA CORP·Filed 2003·Granted Jun 20, 2006·0 cites·19 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →