Inventor · disambiguated record
Robert Muller
Also filed as: MULLER ROBERT · MULLER ROBERT C
4 granted patents·1 pending application·8 citations·filing 2003–2008
67Inventor score
Technology areasG03F
Top patents by PatentIndex Score
5 records- 0176US7057261B2Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip productsLSI LOGIC CORP·Filed 2005·Granted Jun 6, 2006·4 cites·8 claims
- 0274US7763414B2Pseudo low volume reticle (PLVR) design for ASIC manufacturingLSI CORP·Filed 2008·Granted Jul 27, 2010·3 cites·10 claims
- 0344US7016054B2Lithography line width monitor reflecting chip-wide average feature sizeLSI LOGIC CORP·Filed 2003·Granted Mar 21, 2006·1 cites·13 claims
- 0441US6900075B2Mixed LVR and HVR reticle set design for the processing of gate arrays, embedded arrays and rapid chip productsLSI LOGIC CORP·Filed 2003·Granted May 31, 2005·0 cites·6 claims
- 0539US2006063076A1Pseudo low volume reticle (PLVR) design for asic manufacturingJENSEN JOHN·Filed 2004·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Robert Muller files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →