Inventor · disambiguated record
Robert Nychka
Also filed as: NYCHKA ROBERT · NYCHKA ROBERT J · NYCHKA ROBERT J P
8 granted patents·2 pending applications·24 citations·filing 2003–2023
80Inventor score
Top patents by PatentIndex Score
10 records- 0189US9552206B2Integrated circuit with control node circuitry and processing circuitryJOHNSON WILLIAM M·Filed 2011·Granted Jan 24, 2017·16 cites·7 claims
- 0273US11971773B2Discrete power control of components within a computer systemTEXAS INSTRUMENTS INC·Filed 2023·Granted Apr 30, 2024·0 cites·20 claims
- 0365US7809889B2High performance multilevel cache hierarchyTEXAS INSTRUMENTS INC·Filed 2007·Granted Oct 5, 2010·6 cites·16 claims
- 0458US11573622B2Discrete power control of components within a computer systemTEXAS INSTRUMENTS INC·Filed 2019·Granted Feb 7, 2023·0 cites·20 claims
- 0551US10365704B2Discrete power control of components within a computer systemTEXAS INSTRUMENTS INC·Filed 2015·Granted Jul 30, 2019·0 cites·15 claims
- 0648US7139854B2Pipelining access to serialization tokens on a busTEXAS INSTRUMENTS INC·Filed 2003·Granted Nov 21, 2006·1 cites·23 claims
- 0748US2010169578A1Cache tag memoryTEXAS INSTRUMENTS INC·Filed 2008·Application pending·0 cites
- 0840US9146600B2Array and peripheral power control decoded from circuitry and registersNYCHKA ROBERT J P·Filed 2007·Granted Sep 29, 2015·1 cites·3 claims
- 0934US8205057B2Method and system for integrated pipeline write hazard handling using memory attributesNYCHKA ROBERT·Filed 2009·Granted Jun 19, 2012·0 cites·19 claims
- 1034US2013046934A1System caching using heterogenous memoriesNYCHKA ROBERT·Filed 2011·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →