Inventor · disambiguated record
Ronald A. Sartschev
Also filed as: SARTSCHEV RONALD A
24 granted patents·1 pending application·314 citations·filing 1997–2020
96Inventor score
Top patents by PatentIndex Score
25 records- 0188US6868047B2Compact ATE with time stamp systemTERADYNE INC·Filed 2001·Granted Mar 15, 2005·40 cites·18 claims
- 0287US6073259ALow cost CMOS tester with high channel densityTERADYNE INC·Filed 1997·Granted Jun 6, 2000·59 cites·35 claims
- 0383US7023366B1Using a parametric measurement unit for converter testingTERADYNE INC·Filed 2005·Granted Apr 4, 2006·15 cites·8 claims
- 0482US6291981B1Automatic test equipment with narrow output pulsesTERADYNE INC·Filed 2000·Granted Sep 18, 2001·26 cites·7 claims
- 0580US9397670B2Edge generator-based phase locked loop reference clock generator for automated test systemTERADYNE INC·Filed 2014·Granted Jul 19, 2016·7 cites·20 claims
- 0679US9279857B2Automated test system with edge steeringTERADYNE INC·Filed 2013·Granted Mar 8, 2016·4 cites·4 claims
- 0779US6771061B2High speed tester with narrow output pulsesTERADYNE INC·Filed 2002·Granted Aug 3, 2004·23 cites·20 claims
- 0878US9147620B2Edge triggered calibrationVAN DER WAGT JAN PAUL ANTHONIE·Filed 2012·Granted Sep 29, 2015·8 cites·18 claims
- 0976US7574632B2Strobe technique for time stamping a digital signalTERADYNE INC·Filed 2005·Granted Aug 11, 2009·8 cites·7 claims
- 1076US7323898B2Pin electronics driverTERADYNE INC·Filed 2005·Granted Jan 29, 2008·8 cites·17 claims
- 1176US7256600B2Method and system for testing semiconductor devicesTERADYNE INC·Filed 2004·Granted Aug 14, 2007·20 cites·19 claims
- 1276US6448575B1Temperature control structureTERADYNE INC·Filed 2000·Granted Sep 10, 2002·23 cites·19 claims
- 1375US7508228B2Method and system for monitoring test signals for semiconductor devicesTERADYNE INC·Filed 2005·Granted Mar 24, 2009·8 cites·18 claims
- 1474US7573957B2Strobe technique for recovering a clock in a digital signalTERADYNE INC·Filed 2005·Granted Aug 11, 2009·7 cites·20 claims
- 1570US7856578B2Strobe technique for test of digital signal timingTERADYNE INC·Filed 2005·Granted Dec 21, 2010·6 cites·5 claims
- 1667US7102375B2Pin electronics with high voltage functionalityTERADYNE INC·Filed 2004·Granted Sep 5, 2006·11 cites·13 claims
- 1762US8289039B2Pin electronics liquid cooled multi-module for high performance, low cost automated test equipmentBREINLINGER KEITH·Filed 2009·Granted Oct 16, 2012·5 cites·25 claims
- 1858US9244126B2Automated test system with event detection capabilitySARTSCHEV RONALD A·Filed 2013·Granted Jan 26, 2016·2 cites·29 claims
- 1955US7991046B2Calibrating jitterTERADYNE INC·Filed 2007·Granted Aug 2, 2011·1 cites·17 claims
- 2053US7135881B2Method and system for producing signals to test semiconductor devicesTERADYNE INC·Filed 2004·Granted Nov 14, 2006·4 cites·19 claims
- 2153US6374379B1Low-cost configuration for monitoring and controlling parametric measurement units in automatic test equipmentTERADYNE INC·Filed 1999·Granted Apr 16, 2002·17 cites·19 claims
- 2250US7560947B2Pin electronics driverTERADYNE INC·Filed 2005·Granted Jul 14, 2009·1 cites·31 claims
- 2344US6282682B1Automatic test equipment using sigma delta modulation to create reference levelsTERADYNE INC·Filed 1999·Granted Aug 28, 2001·11 cites·6 claims
- 2438US11514958B2Apparatus and method for operating source synchronous devicesTERADYNE INC·Filed 2020·Granted Nov 29, 2022·0 cites·20 claims
- 2535US2004199842A1Test system with high accuracy time measurement systemFiled 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →