Inventor · disambiguated record
Rohit Taneja
Also filed as: Taneja Rohit
12 granted patents·2 pending applications·12 citations·filing 2016–2024
84Inventor score
Top patents by PatentIndex Score
14 records- 0193US11468582B2Leveraging multidimensional sensor data for computationally efficient object detection for autonomous machine applicationsNVIDIA CORP·Filed 2020·Granted Oct 11, 2022·10 cites·20 claims
- 0286US11915145B2Leveraging multidimensional sensor data for computationally efficient object detection for autonomous machine applicationsNVIDIA CORP·Filed 2022·Granted Feb 27, 2024·1 cites·20 claims
- 0380US2025131272A1Leveraging multidimensional sensor data for computationally efficient object detection for autonomous machine applicationsNVIDIA CORP·Filed 2024·Application pending·0 cites
- 0478US12223429B2Leveraging multidimensional sensor data for computationally efficient object detection for autonomous machine applicationsNVIDIA CORP·Filed 2023·Granted Feb 11, 2025·0 cites·20 claims
- 0575US10901710B2Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occurIBM·Filed 2019·Granted Jan 26, 2021·1 cites·1 claims
- 0661US10678523B2Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occursIBM·Filed 2018·Granted Jun 9, 2020·0 cites·17 claims
- 0759US10509635B2Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occurIBM·Filed 2017·Granted Dec 17, 2019·0 cites·2 claims
- 0858US10664250B2Performing register promotion optimizations in a computer program in regions where memory aliasing may occur and executing the computer program on processor hardware that detects memory aliasingIBM·Filed 2018·Granted May 26, 2020·0 cites·13 claims
- 0958US10228918B2Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occursIBM·Filed 2017·Granted Mar 12, 2019·0 cites·1 claims
- 1056US10169009B2Processor that detects memory aliasing in hardware and assures correct operation when memory aliasing occursIBM·Filed 2016·Granted Jan 1, 2019·0 cites·13 claims
- 1156US9934009B2Processor that includes a special store instruction used in regions of a computer program where memory aliasing may occurIBM·Filed 2016·Granted Apr 3, 2018·0 cites·3 claims
- 1252US10169010B2Performing register promotion optimizations in a computer program in regions where memory aliasing may occur and executing the computer program on processor hardware that detects memory aliasingIBM·Filed 2016·Granted Jan 1, 2019·0 cites·12 claims
- 1348US10228921B2Compiler that performs register promotion optimizations in regions of code where memory aliasing may occurIBM·Filed 2016·Granted Mar 12, 2019·0 cites·13 claims
- 1448US2024160491A1Resource prediction for workloadsNVIDIA CORP·Filed 2022·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Rohit Taneja files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →