Inventor · disambiguated record
Russell C. Brockmann
Also filed as: BROCKMANN RUSSELL C · BROCKMANN RUSSELL CLARENCE
27 granted patents·2 pending applications·927 citations·filing 1991–2003
97Inventor score
Top patents by PatentIndex Score
29 records- 0184US5867644ASystem and method for on-chip debug support and performance monitoring in a microprocessorHEWLETT PACKARD CO·Filed 1996·Granted Feb 2, 1999·124 cites·30 claims
- 0282US5729554ASpeculative execution of test patterns in a random test generatorHEWLETT PACKARD CO·Filed 1996·Granted Mar 17, 1998·119 cites·10 claims
- 0381US5956477AMethod for processing information in a microprocessor to facilitate debug and performance monitoringHEWLETT PACKARD CO·Filed 1996·Granted Sep 21, 1999·96 cites·31 claims
- 0479US6609247B1Method and apparatus for re-creating the trace of an emulated instruction set when executed on hardware native to a different instruction set fieldHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Aug 19, 2003·35 cites·19 claims
- 0579US5287477AMemory-resource-driven arbitrationHEWLETT PACKARD CO·Filed 1991·Granted Feb 15, 1994·82 cites·10 claims
- 0676US6625759B1Method and apparatus for verifying the fine-grained correctness of a behavioral model of a central processor unitHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 23, 2003·22 cites·18 claims
- 0775US7343479B2Method and apparatus for implementing two architectures in a chipHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Mar 11, 2008·18 cites·13 claims
- 0875US6678817B1Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jan 13, 2004·23 cites·1 claims
- 0973US7139936B2Method and apparatus for verifying the correctness of a processor behavioral modelHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Nov 21, 2006·16 cites·18 claims
- 1072US6643800B1Method and apparatus for testing microarchitectural features by using tests written in microcodeHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 4, 2003·18 cites·6 claims
- 1167US6745322B1Apparatus and method for conditionally flushing a pipeline upon a failure of a test conditionHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Jun 1, 2004·12 cites·18 claims
- 1266US5887003AApparatus and method for comparing a group of binary fields with an expected pattern to generate match resultsHEWLETT PACKARD CO·Filed 1996·Granted Mar 23, 1999·28 cites·8 claims
- 1365US6618801B1Method and apparatus for implementing two architectures in a chip using bundles that contain microinstructions and template informationHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 9, 2003·10 cites·20 claims
- 1465US5293607AFlexible N-way memory interleavingHEWLETT PACKARD CO·Filed 1991·Granted Mar 8, 1994·44 cites·9 claims
- 1561US5265223APreservation of priority in computer bus arbitrationHEWLETT PACKARD CO·Filed 1992·Granted Nov 23, 1993·38 cites·9 claims
- 1660US6789186B1Method and apparatus to reduce penalty of microcode lookupHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 7, 2004·8 cites·19 claims
- 1760US6622241B1Method and apparatus for reducing branch prediction table pollutionHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Sep 16, 2003·9 cites·10 claims
- 1860US5437019AAddressing method and apparatus for a computer systemHEWLETT PACKARD CO·Filed 1994·Granted Jul 25, 1995·34 cites·26 claims
- 1959US6654849B1Method and apparatus to minimize additional address bits and loading when adding a small patch RAM to a microcode ROMHEWLETT PACKARD DEVELOPMENT CO·Filed 2000·Granted Nov 25, 2003·7 cites·11 claims
- 2058US5257356AMethod of reducing wasted bus bandwidth due to slow responding slaves in a multiprocessor computer systemHEWLETT PACKARD CO·Filed 1991·Granted Oct 26, 1993·34 cites·15 claims
- 2157US5956476ACircuitry and method for detecting signal patterns on a bus using dynamically changing expected patternsHEWLETT PACKARD CO·Filed 1996·Granted Sep 21, 1999·37 cites·8 claims
- 2257US5249297AMethods and apparatus for carrying out transactions in a computer systemHEWLETT PACKARD CO·Filed 1991·Granted Sep 28, 1993·32 cites·20 claims
- 2355US5881224AApparatus and method for tracking events in a microprocessor that can retire more than one instruction during a clock cycleHEWLETT PACKARD CO·Filed 1996·Granted Mar 9, 1999·28 cites·4 claims
- 2452US5784550AMethod for enhanced functional testing of a processor using dynamic trap handlersHEWLETT PACKARD CO·Filed 1996·Granted Jul 21, 1998·25 cites·20 claims
- 2544US7356674B2Method and apparatus for fetching instructions from the memory subsystem of a mixed architecture processor into a hardware emulation engineHEWLETT PACKARD DEVELOPMENT CO·Filed 2003·Granted Apr 8, 2008·0 cites·15 claims
- 2644US5255373ADecreasing average time to access a computer bus by eliminating arbitration delay when the bus is idleHEWLETT PACKARD CO·Filed 1991·Granted Oct 19, 1993·16 cites·5 claims
- 2742US2004064267A1Method and apparatus for testing microarchitectural features by using tests written in microcodeFiled 2003·Application pending·0 cites
- 2840US5881217AInput comparison circuitry and method for a programmable state machineHEWLETT PACKARD CO·Filed 1996·Granted Mar 9, 1999·12 cites·8 claims
- 2939US2004034820A1Apparatus and method for pseudorandom rare event injection to improve verification qualityFiled 2002·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →