Inventor · disambiguated record
Russell H. Fish, Iii
Also filed as: FISH III RUSSELL · FISH III RUSSELL H · FISH III RUSSELL HAMILTON · FISH RUSSELL
16 granted patents·11 pending applications·634 citations·filing 1983–2014
95Inventor score
Top patents by PatentIndex Score
27 records- 0194US6598148B1High performance microprocessor having variable speed system clockPATRIOT SCIENT CORP·Filed 1998·Granted Jul 22, 2003·159 cites·13 claims
- 0294US5809336AHigh performance microprocessor having variable speed system clockPATRIOT SCIENT CORP·Filed 1995·Granted Sep 15, 1998·171 cites·10 claims
- 0391US5440749AHigh performance, low cost microprocessor architectureNANOTRONICS CORP·Filed 1989·Granted Aug 8, 1995·89 cites·29 claims
- 0487US8984256B2Thread optimized multiprocessor architectureFISH RUSSELL·Filed 2008·Granted Mar 17, 2015·19 cites·65 claims
- 0584US5784584AHigh performance microprocessor using instructions that operate within instruction groupsPATRIOT SCIENT CORP·Filed 1995·Granted Jul 21, 1998·79 cites·29 claims
- 0676US5659703AMicroprocessor system with hierarchical stack and method of operationPATRIOT SCIENT CORP·Filed 1995·Granted Aug 19, 1997·50 cites·9 claims
- 0762US8977836B2Thread optimized multiprocessor architectureFISH III RUSSELL H·Filed 2007·Granted Mar 10, 2015·3 cites·23 claims
- 0862US8180869B2Distributed means of organizing an arbitrarily large number of computersFISH RUSSELL·Filed 2010·Granted May 15, 2012·1 cites·19 claims
- 0961US4549825AThermal printer for a low cost electronic mail terminalPOST TECHNOLOGIES INC·Filed 1984·Granted Oct 29, 1985·22 cites·20 claims
- 1058US9934196B2Thread optimized multiprocessor architectureFISH III RUSSELL H·Filed 2014·Granted Apr 3, 2018·0 cites·3 claims
- 1157US5530890AHigh performance, low cost microprocessorNANOTRONICS CORP·Filed 1995·Granted Jun 25, 1996·21 cites·10 claims
- 1254US7424524B2Distributed means of organizing an arbitrarily large number of computersVIAMETRIX INC·Filed 2002·Granted Sep 9, 2008·5 cites·12 claims
- 1349US8086738B2Distributed means of organizing an arbitrarily large number of computersFISH RUSSELL·Filed 2007·Granted Dec 27, 2011·0 cites·11 claims
- 1446US8145795B2Distributed means of organizing an arbitrarily large number of computersFISH RUSSELL·Filed 2010·Granted Mar 27, 2012·0 cites·24 claims
- 1546US2011202681A1Distributed means of organizing an arbitrarily large number of computersFISH RUSSELL·Filed 2011·Application pending·0 cites
- 1645US2008133747A1System to self organize and manage computer usersFISH RUSSELL H·Filed 2007·Application pending·0 cites
- 1744US2003009509A1Distributed means of organizing an arbitrarily large number of computersFiled 2001·Application pending·0 cites
- 1844US2008077911A1Using breakpoints for debugging in a RISC microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 1944US2008071991A1Using trap routines in a RISC microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 2044US2008091920A1Transferring data between registers in a RISC microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 2144US2008072021A1Floating point exception handling in a risc microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 2243US5604915AData processing system having load dependent bus timingNANOTRONICS CORP·Filed 1995·Granted Feb 18, 1997·9 cites·21 claims
- 2343US2007271442A1Detecting the boundaries of memory in a RISC microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 2443US2007271441A1Availability of space in a RISC microprocessor architectureSHAW GEORGE W·Filed 2007·Application pending·0 cites
- 2542US2006230163A1System and method for securely establishing a direct connection between two firewalled computersFISH RUSSELL H III·Filed 2006·Application pending·0 cites
- 2640US2012151232A1CPU in Memory Cache ArchitectureFISH III RUSSELL HAMILTON·Filed 2010·Application pending·0 cites
- 2734US4524242ALow-cost electronic mail terminalPOST TECHNOLOGIES INC·Filed 1983·Granted Jun 18, 1985·6 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →