Inventor · disambiguated record
Rushabh Shah
Also filed as: SHAH RUSHABH · SHAH RUSHABH D · SHAH RUSHABH DHANESH
6 granted patents·8 pending applications·5 citations·filing 2017–2023
70Inventor score
Top patents by PatentIndex Score
14 records- 0184US10395878B2Modular fuse holder and arrangement and connection thereofCOOPER TECHNOLOGIES CO·Filed 2017·Granted Aug 27, 2019·4 cites·7 claims
- 0276US12166124B2Gate-all-around integrated circuit structures having germanium-doped nanoribbon channel structuresINTEL CORP·Filed 2020·Granted Dec 10, 2024·1 cites·23 claims
- 0363US2023197855A1Gate-all-around integrated circuit structures having source or drain structures with regrown central portionsHASAN MOHAMMAD·Filed 2021·Application pending·0 cites
- 0458US10699866B2Modular fuse holder and arrangement and connection thereofEATON INTELLIGENT POWER LTD·Filed 2019·Granted Jun 30, 2020·0 cites·18 claims
- 0558US2025220870A1Integrated circuit structure with varied epitaxial source or drain structures and device typesINTEL CORP·Filed 2023·Application pending·0 cites
- 0657US12426342B2Low germanium, high boron silicon rich capping layer for PMOS contact resistance thermal stabilityINTEL CORP·Filed 2021·Granted Sep 23, 2025·0 cites·8 claims
- 0754US12439640B2Reduced contact resistivity with PMOS germanium and silicon doped with boron gate all around transistorsINTEL CORP·Filed 2021·Granted Oct 7, 2025·0 cites·12 claims
- 0850US12414366B2Co-integration of high voltage (HV) and low voltage (LV) transistor structures, using channel height and spacing modulationINTEL CORP·Filed 2021·Granted Sep 9, 2025·0 cites·20 claims
- 0949US2023178658A1Recessed inner gate spacers and partial replacement channel in non-planar transistorsINTEL CORP·Filed 2021·Application pending·0 cites
- 1049US2023163212A1Gate-all-around transistor device with compressively strained channel layersINTEL CORP·Filed 2021·Application pending·0 cites
- 1148US2023207655A1Formation of metal contacts to silicon germanium layers with etch resistive cap layersINTEL CORP·Filed 2021·Application pending·0 cites
- 1248US2023197816A1Integrated circuit structures having metal gate plug landed on dielectric anchorHASAN MOHAMMAD·Filed 2021·Application pending·0 cites
- 1346US2023101725A1Silicon rich capping layer pre-amorphized with germanium and boron implants for thermal stability and low pmos contact resistivityINTEL CORP·Filed 2021·Application pending·0 cites
- 1444US2023207651A1Gate-all-around integrated circuit structures having source or drain structures with substrate connection portionsHASAN MOHAMMAD·Filed 2021·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →