Inventor · disambiguated record
Ryuji Kan
Also filed as: KAN RYUJI
11 granted patents·5 pending applications·21 citations·filing 2004–2016
84Inventor score
Top patents by PatentIndex Score
16 records- 0178US9442836B2Arithmetic processing device, information processing device, control method for information processing device, and control program for information processing deviceFUJITSU LTD·Filed 2014·Granted Sep 13, 2016·6 cites·9 claims
- 0276US9438271B2Data compression apparatus and methodFUJITSU LTD·Filed 2016·Granted Sep 6, 2016·4 cites·8 claims
- 0365US7343478B2Register window system and method that stores the next register window in a temporary bufferFUJITSU LTD·Filed 2006·Granted Mar 11, 2008·5 cites·20 claims
- 0463US8788561B2Arithmetic circuit, arithmetic processing apparatus and method of controlling arithmetic circuitKAN RYUJI·Filed 2012·Granted Jul 22, 2014·2 cites·13 claims
- 0561US8621281B2Information processing apparatus and control methodKAN RYUJI·Filed 2009·Granted Dec 31, 2013·3 cites·14 claims
- 0658US7958338B2Instruction execution control device and instruction execution control methodFUJITSU LTD·Filed 2009·Granted Jun 7, 2011·1 cites·18 claims
- 0746US2008229080A1Arithmetic processing unitFUJITSU LTD·Filed 2008·Application pending·0 cites
- 0845US8549054B2Arithmetic processing apparatus and arithmetic processing methodKAN RYUJI·Filed 2008·Granted Oct 1, 2013·0 cites·18 claims
- 0945US8015447B2Processor debugging apparatus and processor debugging methodFUJITSU LTD·Filed 2004·Granted Sep 6, 2011·0 cites·13 claims
- 1045US2008307029A1Arithmetic device and arithmetic methodFUJITSU LTD·Filed 2008·Application pending·0 cites
- 1145US2008172551A1Operation verification method for verifying operations of a processorFUJITSU LTD·Filed 2008·Application pending·0 cites
- 1243US8655935B2Processing apparatus and control method performing taylor series operation associated with executing floating point instructionHONDOU MIKIO·Filed 2008·Granted Feb 18, 2014·0 cites·6 claims
- 1342US8903881B2Arithmetic circuit, arithmetic processing apparatus and method of controlling arithmetic circuitKAN RYUJI·Filed 2012·Granted Dec 2, 2014·0 cites·16 claims
- 1440US9959095B2Adder-subtractor and control method thereofFUJITSU LTD·Filed 2016·Granted May 1, 2018·0 cites·6 claims
- 1539US2012259903A1Arithmetic circuit, arithmetic processing apparatus and method of controlling arithmetic circuitKAN RYUJI·Filed 2012·Application pending·0 cites
- 1635US2014289208A1Data compression apparatus, data compression method, data decompression apparatus, and data decompression methodFUJITSU LTD·Filed 2014·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →