Inventor · disambiguated record
S. Babar Raza
Also filed as: RAZA S BABAR
49 granted patents·723 citations·filing 1995–2004
98Inventor score
Top patents by PatentIndex Score
49 records- 0189US6917661B1Method, architecture and circuitry for controlling pulse width in a phase and/or frequency detectorCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Jul 12, 2005·58 cites·19 claims
- 0286US7738496B1Device that provides the functionality of dual-ported memory using single-ported memory for multiple clock domainsCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Jun 15, 2010·39 cites·18 claims
- 0385US7184359B1System and method for staging concurrent accesses to a memory address location via a single port using a high speed sampling clockCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Feb 27, 2007·36 cites·9 claims
- 0481US5926035AMethod and apparatus to generate mask programmable deviceCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jul 20, 1999·32 cites·21 claims
- 0580US7382805B1Method and apparatus for aggregating Ethernet streamsCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Jun 3, 2008·31 cites·18 claims
- 0679US6816955B1Logic for providing arbitration for synchronous dual-port memoryCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Nov 9, 2004·28 cites·23 claims
- 0779US5986489ASlew rate control circuit for an integrated circuitCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Nov 16, 1999·35 cites·8 claims
- 0876US6657472B1Circuit, system, and method for programmably setting an input to a prioritizer of a latch to avoid a non-desired output state of the latchCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Dec 2, 2003·18 cites·18 claims
- 0975US7016349B1Logic for generating multicast/unicast address (es)CYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Mar 21, 2006·21 cites·19 claims
- 1071US6510487B1Design architecture for a parallel and serial programming interfaceCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jan 21, 2003·25 cites·10 claims
- 1170US6816979B1Configurable fast clock detection logic with programmable resolutionCYPRESS SEMICONDUCTOR CORP·Filed 2001·Granted Nov 9, 2004·19 cites·17 claims
- 1270US6631455B1Logic for initializing the depth of the queue pointer memoryCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Oct 7, 2003·14 cites·20 claims
- 1369US7934057B1Logic for implementing a dual clock domain read access with predictable timing for bi-directional inputs/outputsCYPRESS SEMICONDUCTOR CORP·Filed 2003·Granted Apr 26, 2011·14 cites·21 claims
- 1468US6925506B1Architecture for implementing virtual multiqueue fifosCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Aug 2, 2005·13 cites·20 claims
- 1567US6578118B1Method and logic for storing and extracting in-band multicast port information stored along with the data in a single memory without memory read cycle overheadCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Jun 10, 2003·12 cites·20 claims
- 1662US6810098B1FIFO read interface protocolCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Oct 26, 2004·8 cites·18 claims
- 1762US6715021B1Out-of-band look-ahead arbitration method and/or architectureCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Mar 30, 2004·8 cites·20 claims
- 1862US6629226B1Fifo read interface protocolCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Sep 30, 2003·8 cites·19 claims
- 1960US5943488AMethod and apparatus to generate mask programmable deviceCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Aug 24, 1999·38 cites·22 claims
- 2058US6640267B1Architecture for multi-queue storage elementCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Oct 28, 2003·32 cites·20 claims
- 2157US6625711B1Method and/or architecture for implementing queue expansion in multiqueue devicesCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Sep 23, 2003·5 cites·22 claims
- 2257US6581144B1Method and logic for initializing the forward-pointer memory during normal operation of the device as a background processCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted Jun 17, 2003·5 cites·20 claims
- 2357US6229811B1Architecture for a dual segment dual speed repeaterCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted May 8, 2001·4 cites·20 claims
- 2456US5635856AHigh speed programmable macrocell with combined path for storage and combinatorial modesCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Jun 3, 1997·15 cites·30 claims
- 2555US7343510B1Method and device for selecting one of multiple clock signals based on frequency differences of such clock signalsCYPRESS SEMICONDUCTOR CORP·Filed 2004·Granted Mar 11, 2008·4 cites·19 claims
- 2654US6118299AMethod and apparatus to generate mask programmable deviceCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Sep 12, 2000·10 cites·15 claims
- 2754US5748559ACircuit for high speed serial programming of programmable logic devicesCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted May 5, 1998·15 cites·32 claims
- 2851US6502197B1Method and architecture for synchronizing a transport and path overhead generator and/or extractor to an path overhead transport and path processorCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Dec 31, 2002·12 cites·16 claims
- 2951US5821794AClock distribution architecture and method for high speed CPLDsCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Oct 13, 1998·11 cites·15 claims
- 3051US5745354APump circuit for generating multiple high voltage outputs from two different inputsCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Apr 28, 1998·17 cites·25 claims
- 3149US5654652AHigh-speed ratio CMOS logic structure with static and dynamic pullups and/or pulldowns using feedbackCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Aug 5, 1997·10 cites·29 claims
- 3246US7334147B1Method and architecture for synchronizing a path generator and/or extractor to a processorCYPRESS SEMICONDUCTOR CORP·Filed 2002·Granted Feb 19, 2008·0 cites·20 claims
- 3346US5689686AMethods for maximizing routability in a programmable interconnect matrix having less than full connectabilityCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Nov 18, 1997·8 cites·13 claims
- 3445US6195360B1Architecture for a dual segment dual speed repeaterCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Feb 27, 2001·21 cites·12 claims
- 3545US5565791AMethod and apparatus for disabling unused sense amplifiersCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Oct 15, 1996·8 cites·22 claims
- 3643US5973545ASingle pump circuit for generating high voltage from two different inputsCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Oct 26, 1999·11 cites·20 claims
- 3743US5848066AMethods for maximizing routability in a programmable interconnect matrix having less than full connectabilityCYPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Dec 8, 1998·7 cites·52 claims
- 3841US5923868AMethods for maximizing routability in a programmable interconnect matrix having less than full connectabilityCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Jul 13, 1999·5 cites·36 claims
- 3939US6603771B1Highly scalable architecture for implementing switch fabrics with quality of servicesCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Aug 5, 2003·11 cites·20 claims
- 4039US6584517B1Circuit and method for supporting multicast/broadcast operations in multi-queue storage devicesCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Jun 24, 2003·11 cites·22 claims
- 4138US6055241AArchitecture for a dual segment dual speed repeaterCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Apr 25, 2000·10 cites·21 claims
- 4235US6665265B1Overhead serial communication schemeCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Dec 16, 2003·4 cites·18 claims
- 4335US6640300B1Method and apparatus for width and depth expansion in a multi-queue systemCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Oct 28, 2003·6 cites·31 claims
- 4434US6243664B1Methods for maximizing routability in a programmable interconnect matrix having less than full connectabilityCYPRESS SEMICONDUCTOR CORP·Filed 1998·Granted Jun 5, 2001·7 cites·19 claims
- 4534US5710778AHigh voltage reference and measurement circuit for verifying a programmable cellCYRPRESS SEMICONDUCTOR CORP·Filed 1996·Granted Jan 20, 1998·7 cites·24 claims
- 4632US6625177B1Circuit, method and/or architecture for improving the performance of a serial communication linkCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Sep 23, 2003·3 cites·17 claims
- 4731US6628656B1Circuit, method and/or architecture for improving the performance of a serial communication linkCYPRESS SEMICONDUCTOR CORP·Filed 1999·Granted Sep 30, 2003·2 cites·29 claims
- 4830US6097738AMulti-speed retainerCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Aug 1, 2000·3 cites·15 claims
- 4929US6115364ADistributed port select method for a multi-segment repeaterCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Sep 5, 2000·2 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →