Inventor · disambiguated record
Sameer M. Gauria
Also filed as: GAURIA SAMEER M
12 granted patents·250 citations·filing 2006–2019
91Inventor score
Top patents by PatentIndex Score
12 records- 0197US10409887B1Generalized dot product for computer vision applicationsAMBARELLA INC·Filed 2017·Granted Sep 10, 2019·54 cites·20 claims
- 0295US7647467B1Tuning DRAM I/O parameters on the flyNVIDIA CORP·Filed 2006·Granted Jan 12, 2010·76 cites·16 claims
- 0394US10310768B1Convolution calculations in multiple dimensionsAMBARELLA INC·Filed 2017·Granted Jun 4, 2019·21 cites·20 claims
- 0489US7755631B1Transposition structures and methods to accommodate parallel processing in a graphics processing unit (“GPU”)NVIDIA CORP·Filed 2006·Granted Jul 13, 2010·24 cites·13 claims
- 0589US7701459B1Primitive oriented assembly for parallel vertex/geometry processingNVIDIA CORP·Filed 2006·Granted Apr 20, 2010·23 cites·18 claims
- 0687US10620876B1Convolution calculations in multiple dimensionsAMBARELLA INT LP·Filed 2019·Granted Apr 14, 2020·4 cites·20 claims
- 0787US7797258B1Graphics system transposer read schedulerNVIDIA CORP·Filed 2006·Granted Sep 14, 2010·19 cites·10 claims
- 0887US7796137B1Enhanced tag-based structures, systems and methods for implementing a pool of independent tags in cache memoriesNVIDIA CORP·Filed 2006·Granted Sep 14, 2010·19 cites·18 claims
- 0974US8237725B1Vertex cache map mode for per-vertex state changesBOWMAN JAMES C·Filed 2007·Granted Aug 7, 2012·10 cites·20 claims
- 1062US10846364B1Generalized dot product for computer vision applicationsAMBARELLA INT LP·Filed 2019·Granted Nov 24, 2020·0 cites·20 claims
- 1144US7571281B1Look-up filter structures, systems and methods for filtering accesses to a pool of tags for cache memoriesNVIDIA CORP·Filed 2006·Granted Aug 4, 2009·0 cites·10 claims
- 1234US10466926B1Efficient scheme for reversing image data in a memory bufferAMBARELLA INC·Filed 2017·Granted Nov 5, 2019·0 cites·17 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →