Inventor · disambiguated record
Saya Goud Langadi
Also filed as: LANGADI SAYA GOUD
16 granted patents·7 pending applications·32 citations·filing 2010–2024
90Inventor score
Top patents by PatentIndex Score
23 records- 0193US11392455B1Methods, apparatus, and articles of manufacture to determine memory access integrity based on feedback from memoryTEXAS INSTRUMENTS INC·Filed 2021·Granted Jul 19, 2022·6 cites·20 claims
- 0285US11663095B2Error detection circuitTEXAS INSTRUMENTS INC·Filed 2021·Granted May 30, 2023·2 cites·20 claims
- 0379US8803554B2Missing clock circuit switching clock from second to first clockTEXAS INSTRUMENTS INC·Filed 2012·Granted Aug 12, 2014·5 cites·8 claims
- 0476US2025021494A1Processor with hardware-integrated memory access protectionTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 0576US2025021656A1Processor with hardware-integrated memory access protectionTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 0676US2025021242A1Processor with hardware-integrated memory access protectionTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 0775US9003260B2Partial-writes to ECC (error check code) enabled memoriesLANGADI SAYA GOUD·Filed 2012·Granted Apr 7, 2015·7 cites·13 claims
- 0875US8384435B2Clock switching circuit with priority multiplexerTEXAS INSTRUMENTS INC·Filed 2011·Granted Feb 26, 2013·4 cites·10 claims
- 0974US11061783B2Error detection circuitTEXAS INSTRUMENTS INC·Filed 2019·Granted Jul 13, 2021·2 cites·21 claims
- 1073US12504974B2Methods and apparatus to sequence branch operationsTEXAS INSTRUMENTS INC·Filed 2024·Granted Dec 23, 2025·0 cites·20 claims
- 1171US12032440B2Methods, apparatus, and articles of manufacture to determine memory access integrity based on feedback from memoryTEXAS INSTRUMENTS INC·Filed 2022·Granted Jul 9, 2024·0 cites·19 claims
- 1267US2023221959A1Instruction packing scheme for vliw cpu architectureTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 1365US8384440B2High resolution captureTEXAS INSTRUMENTS INC·Filed 2010·Granted Feb 26, 2013·3 cites·4 claims
- 1464US9021170B2System and method for improving ECC enabled memory timingLANGADI SAYA GOUD·Filed 2012·Granted Apr 28, 2015·2 cites·3 claims
- 1561US11593110B2Instruction packing scheme for VLIW CPU architectureTEXAS INSTRUMENTS INC·Filed 2021·Granted Feb 28, 2023·0 cites·20 claims
- 1660US2025021511A1Programmable Interface Circuit to Operate SensorsTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 1756US2025291754A1Adaptive Burst Transfer for Direct Memory AccessTEXAS INSTRUMENTS INC·Filed 2024·Application pending·0 cites
- 1852US2024362023A1Methods, apparatus, and articles of manufacture to align data to address boundaries in memoryTEXAS INSTRUMENTS INC·Filed 2023·Application pending·0 cites
- 1949US9910803B2Multi master arbitration scheme in a system on chipTEXAS INSTRUMENTS INC·Filed 2014·Granted Mar 6, 2018·0 cites·19 claims
- 2048US9645964B2System and method for improving ECC enabled memory timingTEXAS INSTRUMENTS INC·Filed 2015·Granted May 9, 2017·0 cites·4 claims
- 2146US8473797B2Circuits and methods for clock malfunction detectionGUPTA CHIRAG SURESHCHANDRA·Filed 2011·Granted Jun 25, 2013·1 cites·17 claims
- 2242US10177747B2High resolution captureTEXAS INSTRUMENTS INC·Filed 2016·Granted Jan 8, 2019·0 cites·14 claims
- 2339US10062451B2Background memory test apparatus and methodsTEXAS INSTRUMENTS INC·Filed 2016·Granted Aug 28, 2018·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →