Inventor · disambiguated record
Saikat Mandal
Also filed as: MANDAL SAIKAT
19 granted patents·4 pending applications·37 citations·filing 2017–2025
91Inventor score
Files withINTEL CORP23
Top patents by PatentIndex Score
23 records- 0198US11087522B1Apparatus and method for asynchronous ray tracingINTEL CORP·Filed 2020·Granted Aug 10, 2021·22 cites·36 claims
- 0286US10424107B2Hierarchical depth buffer back annotatonINTEL CORP·Filed 2017·Granted Sep 24, 2019·5 cites·22 claims
- 0386US10102609B1Low granularity coarse depth test efficiency enhancementINTEL CORP·Filed 2017·Granted Oct 16, 2018·4 cites·30 claims
- 0485US11615585B2Enhancing hierarchical depth buffer culling efficiency via mask accumulationINTEL CORP·Filed 2021·Granted Mar 28, 2023·1 cites·20 claims
- 0581US11341709B2Apparatus and method using triangle pairs and shared transformation circuitry to improve ray tracing performanceINTEL CORP·Filed 2019·Granted May 24, 2022·2 cites·24 claims
- 0679US2024282045A1Apparatus and method using triangle pairs and shared transformation circuitry to improve ray tracing performanceINTEL CORP·Filed 2024·Application pending·0 cites
- 0778US12020370B2Enhancing hierarchical depth buffer culling efficiency via mask accumulationINTEL CORP·Filed 2023·Granted Jun 25, 2024·0 cites·20 claims
- 0875US10839595B2Apparatus and method for optimizing a hierarchical depth bufferINTEL CORP·Filed 2019·Granted Nov 17, 2020·2 cites·21 claims
- 0974US12307547B2Apparatus and method for performing a stable and short latency sorting operationINTEL CORP·Filed 2024·Granted May 20, 2025·0 cites·20 claims
- 1074US11922557B2Apparatus and method using triangle pairs and shared transformation circuitry to improve ray tracing performanceINTEL CORP·Filed 2022·Granted Mar 5, 2024·0 cites·18 claims
- 1174US11107269B2Enhancing hierarchical depth buffer culling efficiency via mask accumulationINTEL CORP·Filed 2019·Granted Aug 31, 2021·1 cites·20 claims
- 1270US11615584B2Hierarchical depth buffer back annotationINTEL CORP·Filed 2021·Granted Mar 28, 2023·0 cites·20 claims
- 1370US2025232397A1Generation and storage of compressed z-planes in graphics processingINTEL CORP·Filed 2025·Application pending·0 cites
- 1468US2022130097A1Apparatus and method for asynchronous ray tracingINTEL CORP·Filed 2021·Application pending·0 cites
- 1567US11250539B2Low granularity coarse depth test efficiency enhancementINTEL CORP·Filed 2020·Granted Feb 15, 2022·0 cites·20 claims
- 1666US12236498B2Generation and storage of compressed Z-planes in graphics processingINTEL CORP·Filed 2021·Granted Feb 25, 2025·0 cites·16 claims
- 1761US11900498B2Apparatus and method for performing a stable and short latency sorting operationINTEL CORP·Filed 2020·Granted Feb 13, 2024·0 cites·24 claims
- 1860US12182023B2Opportunistic late depth testing to prevent stalling for overlapping cache linesINTEL CORP·Filed 2021·Granted Dec 31, 2024·0 cites·24 claims
- 1960US11080925B2Hierarchical depth buffer back annotationINTEL CORP·Filed 2019·Granted Aug 3, 2021·0 cites·20 claims
- 2059US2025265772A1Occlusion culling for depth values in a depth bufferINTEL CORP·Filed 2024·Application pending·0 cites
- 2156US10748242B2Low granularity coarse depth test efficiency enhancementINTEL CORP·Filed 2018·Granted Aug 18, 2020·0 cites·20 claims
- 2254US10430990B2Pixel compression mechanismINTEL CORP·Filed 2017·Granted Oct 1, 2019·0 cites·25 claims
- 2342US10319138B2Graphics with early stencil testINTEL CORP·Filed 2017·Granted Jun 11, 2019·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →