Inventor · disambiguated record
Sameer D. Parab
Also filed as: PARAB SAMEER · PARAB SAMEER D
10 granted patents·47 citations·filing 1996–2013
87Inventor score
Top patents by PatentIndex Score
10 records- 0174US8274160B2Active area bonding compatible high current structuresGASNER JOHN T·Filed 2010·Granted Sep 25, 2012·3 cites·22 claims
- 0268US7795130B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2007·Granted Sep 14, 2010·3 cites·11 claims
- 0367US7224074B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2005·Granted May 29, 2007·3 cites·57 claims
- 0463US6617646B2Reduced substrate capacitance high performance SOI processELANTEC SEMICONDUCTOR INC·Filed 2002·Granted Sep 9, 2003·10 cites·12 claims
- 0560US7005369B2Active area bonding compatible high current structuresINTERSIL AMERICAN INC·Filed 2003·Granted Feb 28, 2006·8 cites·44 claims
- 0656US8946912B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2013·Granted Feb 3, 2015·0 cites·15 claims
- 0754US8652960B2Active area bonding compatible high current structuresINTERSIL INC·Filed 2012·Granted Feb 18, 2014·0 cites·19 claims
- 0851US8569896B2Active area bonding compatible high current structuresGASNER JOHN T·Filed 2012·Granted Oct 29, 2013·0 cites·19 claims
- 0944US5846374AGas agitated liquid etcherELANTEC SEMICONDUCTOR INC·Filed 1996·Granted Dec 8, 1998·16 cites·22 claims
- 1033US6403447B1Reduced substrate capacitance high performance SOI processELANTEC SEMICONDUCTOR INC·Filed 1999·Granted Jun 11, 2002·4 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →