Inventor · disambiguated record
Santhanakrishnan Raman
Also filed as: RAMAN SANTHANAKRISHNAN
3 granted patents·28 citations·filing 2001–2004
69Inventor score
Technology areasG06F
Files withLSI LOGIC CORP3
Top patents by PatentIndex Score
3 records- 0165US7007259B2Method for providing clock-net aware dummy metal using dummy regionsLSI LOGIC CORP·Filed 2003·Granted Feb 28, 2006·14 cites·37 claims
- 0260US7006962B1Distributed delay prediction of multi-million gate deep sub-micron ASIC designsLSI LOGIC CORP·Filed 2001·Granted Feb 28, 2006·10 cites·19 claims
- 0352US7174526B2Accurate density calculation with density views in layout databasesLSI LOGIC CORP·Filed 2004·Granted Feb 6, 2007·4 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →